HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 209

IC H8/3672 MCU FLASH 48LQFP

HD64F3672FXV

Manufacturer Part Number
HD64F3672FXV
Description
IC H8/3672 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FXV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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(A)
Yes
No
Figure 13.8 Sample Serial Data Reception Flowchart (Asynchronous mode) (1)
Read receive data in RDR
Clear RE bit in SCR3 to 0
Read RDRF flag in SSR
Read OER, PER, and
OER+PER+FER = 1
All data received?
FER flags in SSR
Start reception
RDRF = 1
<End>
Yes
No
No
(Continued on next page)
Error processing
[1]
Yes
[2]
[3]
[4]
Section 13 Serial Communication Interface 3 (SCI3)
[1] Read the OER, PER, and FER flags in
[2] Read SSR and check that RDRF = 1,
[3] To continue serial reception, before the
[4] If a receive error occurs, read the OER,
The RDRF flag is cleared automatically.
SSR to identify the error. If a receive
error occurs, performs the appropriate
error processing.
then read the receive data in RDR.
The RDRF flag is cleared automatically.
stop bit for the current frame is
received, read the RDRF flag and read
RDR.
PER, and FER flags in SSR to identify
the error. After performing the
appropriate error processing, ensure
that the OER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
Rev.4.00 Nov. 02, 2005 Page 183 of 304
REJ09B0143-0400

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