HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 15

• Manufacturer Part Number: HD64F3672FXV
• Description: IC H8/3672 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FXV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 48-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.4 Operation ........................................................................................................................... 142
11.5 Operation Timing............................................................................................................... 151
11.6 Usage Notes ....................................................................................................................... 156
Section 12 Watchdog Timer ..............................................................................159
12.1 Features.............................................................................................................................. 159
12.2 Register Descriptions ......................................................................................................... 159
12.3 Operation ........................................................................................................................... 162
Section 13 Serial Communication Interface 3 (SCI3) .......................................163
13.1 Features.............................................................................................................................. 163
13.2 Input/Output Pins ............................................................................................................... 165
13.3 Register Descriptions ......................................................................................................... 165
13.4 Operation in Asynchronous Mode ..................................................................................... 177
11.3.7 Timer Counter (TCNT)......................................................................................... 141
11.3.8 General Registers A to D (GRA to GRD)............................................................. 141
11.4.1 Normal Operation ................................................................................................. 142
11.4.2 PWM Operation.................................................................................................... 146
11.5.1 TCNT Count Timing ............................................................................................ 151
11.5.2 Output Compare Output Timing ........................................................................... 151
11.5.3 Input Capture Timing............................................................................................ 152
11.5.4 Timing of Counter Clearing by Compare Match .................................................. 153
11.5.5 Buffer Operation Timing ...................................................................................... 153
11.5.6 Timing of IMFA to IMFD Flag Setting at Compare Match.................................. 154
11.5.7 Timing of IMFA to IMFD Setting at Input Capture ............................................. 155
11.5.8 Timing of Status Flag Clearing............................................................................. 155
12.2.1 Timer Control/Status Register WD (TCSRWD)................................................... 160
12.2.2 Timer Counter WD (TCWD)................................................................................ 161
12.2.3 Timer Mode Register WD (TMWD) .................................................................... 161
13.3.1 Receive Shift Register (RSR) ............................................................................... 166
13.3.2 Receive Data Register (RDR) ............................................................................... 166
13.3.3 Transmit Shift Register (TSR) .............................................................................. 166
13.3.4 Transmit Data Register (TDR).............................................................................. 166
13.3.5 Serial Mode Register (SMR) ................................................................................ 167
13.3.6 Serial Control Register 3 (SCR3).......................................................................... 168
13.3.7 Serial Status Register (SSR) ................................................................................. 170
13.3.8 Bit Rate Register (BRR) ....................................................................................... 172
13.4.1 Clock..................................................................................................................... 177
13.4.2 SCI3 Initialization................................................................................................. 178
13.4.3 Data Transmission ................................................................................................ 179
Rev.4.00 Nov. 02, 2005 Page xiii of xxiv