HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 16

IC H8/3672 MCU FLASH 48LQFP

HD64F3672FXV

Manufacturer Part Number
HD64F3672FXV
Description
IC H8/3672 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FXV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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13.5 Operation in Clocked Synchronous Mode ......................................................................... 185
13.6 Multiprocessor Communication Function.......................................................................... 193
13.7 Interrupts............................................................................................................................ 200
13.8 Usage Notes ....................................................................................................................... 201
Section 14 A/D Converter ................................................................................. 203
14.1 Features.............................................................................................................................. 203
14.2 Input/Output Pins............................................................................................................... 205
14.3 Register Description .......................................................................................................... 206
14.4 Operation ........................................................................................................................... 209
14.5 A/D Conversion Accuracy Definitions .............................................................................. 212
14.6 Usage Notes ....................................................................................................................... 214
Section 15 Power Supply Circuit ...................................................................... 215
15.1 When Using Internal Power Supply Step-Down Circuit ................................................... 215
15.2 When Not Using Internal Power Supply Step-Down Circuit............................................. 216
Rev.4.00 Nov. 02, 2005 Page xiv of xxiv
13.4.4 Serial Data Reception ........................................................................................... 181
13.5.1 Clock..................................................................................................................... 185
13.5.2 SCI3 Initialization................................................................................................. 185
13.5.3 Serial Data Transmission ...................................................................................... 186
13.5.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 189
13.5.5 Simultaneous Serial Data Transmission and Reception........................................ 191
13.6.1 Multiprocessor Serial Data Transmission ............................................................. 195
13.6.2 Multiprocessor Serial Data Reception .................................................................. 196
13.8.1 Break Detection and Processing ........................................................................... 201
13.8.2 Mark State and Break Sending ............................................................................. 201
13.8.3 Receive Error Flags and Transmit Operations
13.8.4 Receive Data Sampling Timing and Reception Margin
14.3.1 A/D Data Registers A to D (ADDRA to ADDRD) .............................................. 206
14.3.2 A/D Control/Status Register (ADCSR) ................................................................ 207
14.3.3 A/D Control Register (ADCR) ............................................................................. 208
14.4.1 Single Mode.......................................................................................................... 209
14.4.2 Scan Mode ............................................................................................................ 209
14.4.3 Input Sampling and A/D Conversion Time .......................................................... 210
14.4.4 External Trigger Input Timing.............................................................................. 211
14.6.1 Permissible Signal Source Impedance .................................................................. 214
14.6.2 Influences on Absolute Accuracy ......................................................................... 214
(Clocked Synchronous Mode Only) ..................................................................... 201
in Asynchronous Mode......................................................................................... 202

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