MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 40

IC MCU 25MHZ ETHERNT/PHY 112LQFP

MC9S12NE64CPV

Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64CPV

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 1 MC9S12NE64 Device Overview
The PRTIDH register is constructed of four hexadecimal digits (0xABCD) as follows:
Digit “A” = Family ID
Digit “B” = Memory ID (flash size)
Digit “C” = Major mask revision
Digit “D” = Minor mask revision
Currently, family IDs are:
0x0 = D family
0x1 = H family
0x2 = B family
0x3 = C family
0x4 = T family
0x5 = E family
0x6 = reserved
0x7 = reserved
0x8 = NE family
Current memory IDs are:
0x0 = 256K
0x1 = 128K
0x2 = 64K
0x3 = 32K
0x4 = 512K
The major and minor mask revision increments from 0x0 as follows:
The device memory sizes are located in two 8-bit registers MEMSIZ0 and MEMSIZ1 (addresses $001C
and $001D after reset).
and control (MMC) block description chapter for further details.
1.2
This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal
properties, and detailed discussion of signals.
40
Major mask increments on a complete (full/all layer) mask change.
Minor mask increments on a single or smaller than full mask change.
Signal Description
Table 1-3
MC9S12NE64
MC9S12NE64
shows the read-only values of these registers. See the module mapping
Table 1-3. Memory Size Registers
MC9S12NE64 Data Sheet, Rev 1.0
Register Name
MEMSIZ0
MEMSIZ1
Value
$03
$80
Freescale Semiconductor

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