MC908JB8FBE Freescale Semiconductor, MC908JB8FBE Datasheet - Page 93

IC MCU 8K FLASH 3MHZ 44-QFP

MC908JB8FBE

Manufacturer Part Number
MC908JB8FBE
Description
IC MCU 8K FLASH 3MHZ 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JB8FBE

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-QFP
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USB
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Package
44PQFP
Family Name
HC08
Maximum Speed
3 MHz
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
3MHz
Total Internal Ram Size
256Byte
# I/os (max)
37
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Technical Data — MC68HC908JB8•MC68HC08JB8•MC68HC08JT8
8.1 Contents
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
8.2
8.3
8.3.1
8.3.2
8.3.3
8.4
8.4.1
8.4.2
8.4.2.1
8.4.2.2
8.4.2.3
8.4.2.4
8.4.2.5
8.4.2.6
8.4.2.7
8.5
8.5.1
8.5.2
8.5.3
8.6
8.6.1
8.6.1.1
8.6.1.2
8.6.2
8.6.2.1
8.6.3
8.6.4
8.6.5
Section 8. System Integration Module (SIM)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
SIM Bus Clock Control and Generation . . . . . . . . . . . . . . . . . . 96
Reset and System Initialization. . . . . . . . . . . . . . . . . . . . . . . . . 97
SIM Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Exception Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104
Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Clock Startup from POR or LVI Reset . . . . . . . . . . . . . . . . . 97
Clocks in Stop Mode and Wait Mode . . . . . . . . . . . . . . . . . . 97
External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Active Resets from Internal Sources . . . . . . . . . . . . . . . . . . 99
SIM Counter During Power-On Reset . . . . . . . . . . . . . . . . 103
SIM Counter During Stop Mode Recovery . . . . . . . . . . . . . 104
SIM Counter and Reset States. . . . . . . . . . . . . . . . . . . . . . 104
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Interrupt Status Registers. . . . . . . . . . . . . . . . . . . . . . . . . . 108
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Status Flag Protection in Break Mode . . . . . . . . . . . . . . . . 110
System Integration Module (SIM)
Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
Computer Operating Properly (COP) Reset. . . . . . . . . . 101
Illegal Opcode Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Low-Voltage Inhibit (LVI) Reset . . . . . . . . . . . . . . . . . . . 102
Universal Serial Bus Reset . . . . . . . . . . . . . . . . . . . . . . 102
Registers Values After Different Resets. . . . . . . . . . . . . 102
Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
SWI Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Interrupt Status Register 1 . . . . . . . . . . . . . . . . . . . . . . . 109
Technical Data
93

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