MC908JB8FBE Freescale Semiconductor, MC908JB8FBE Datasheet - Page 62

• Manufacturer Part Number: MC908JB8FBE
• Description: IC MCU 8K FLASH 3MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8FBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-QFP
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Package: 44PQFP
• Family Name: HC08
• Maximum Speed: 3 MHz
• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 3MHz
• Total Internal Ram Size: 256Byte
• # I/os (max): 37
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FLASH Memory
4.9.1 Variables
4.9.2 ERASE Routine
Technical Data
62
The ROM-resident routines use three variables: CTRLBYT, CPUSPD
and LADDR; and one data buffer. The minimum size of the data buffer
is one byte and the maximum size is 64 bytes.
CPUSPD must be set before calling the ERASE or PROGRAM routine,
and should be set to four times the value of the CPU internal bus speed
in MHz. For example: for CPU speed of 3MHz, CPUSPD should be set
to 12.
The ERASE routine erases the entire FLASH memory. The routine does
not check for a blank range before or after erase.
CTRLBYT
Routine
Calling Address
Stack Use
Input
DATABUF
CPUSPD
Variable
LADDR
Table 4-2. ROM-Resident Routine Variables
FLASH Memory
$004C–$008B
$004A–$004B
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Address
ERASE
$FC06
5 Bytes
CPUSPD — CPU speed
HX —
CTRLBYT — Mass erase
$0048
$0049
Table 4-3. ERASE Routine
Mass erase if bit 6 = 1
Contains any address in the range to be
erased
Control byte for setting mass erase.
Timing adjustment for different CPU
speeds.
Last FLASH address to be programmed.
Data buffer for programming and verifying.
Description
Freescale Semiconductor