MC908JB8FBE Freescale Semiconductor, MC908JB8FBE Datasheet - Page 82

• Manufacturer Part Number: MC908JB8FBE
• Description: IC MCU 8K FLASH 3MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8FBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-QFP
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Package: 44PQFP
• Family Name: HC08
• Maximum Speed: 3 MHz
• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 3MHz
• Total Internal Ram Size: 256Byte
• # I/os (max): 37
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Central Processor Unit (CPU)
Technical Data
82
EOR #opr
EOR opr
EOR opr
EOR opr,X
EOR opr,X
EOR ,X
EOR opr,SP
EOR opr,SP
INC opr
INCA
INCX
INC opr,X
INC ,X
INC opr,SP
JMP opr
JMP opr
JMP opr,X
JMP opr,X
JMP ,X
JSR opr
JSR opr
JSR opr,X
JSR opr,X
JSR ,X
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDA opr,SP
LDA opr,SP
LDHX #opr
LDHX opr
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LDX opr,SP
LDX opr,SP
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSL opr,SP
Source
Form
Exclusive OR M with A
Increment
Jump to Subroutine
Load A from M
Load H:X from M
Load X from M
Logical Shift Left
(Same as ASL)
Jump
Operation
Table 6-1. Instruction Set Summary (Sheet 5 of 9)
Central Processor Unit (CPU)
PC ← (PC) + n (n = 1, 2, or 3)
PC ← Unconditional Address
Push (PCH); SP ← (SP) – 1
Push (PCL); SP ← (SP) – 1
C
PC ← Jump Address
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
H:X ← (M:M + 1)
b7
A ← (A ⊕ M)
M ← (M) + 1
M ← (M) + 1
M ← (M) + 1
M ← (M) + 1
Description
A ← (A) + 1
X ← (X) + 1
A ← (M)
X ← (M)
b0
0
V H I N Z C
0 – –
– – – – – –
– – – – – –
0 – –
0 – –
0 – –
– –
– –
Effect on
CCR
–
–
–
–
–
Freescale Semiconductor
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
DIR
EXT
IX2
IX1
IX
DIR
EXT
IX2
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
IMM
DIR
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
INH
INH
IX1
IX
SP1
9ED8
9E6C
9ED6
9EEE
9EDE
9EE8
9EE6
9E68
BC
CC
DC
EC
BD
CD
DD
ED
CE
DE
A8
B8
C8
D8
E8
3C
4C
5C
6C
7C
FC
FD
A6
B6
C6
D6
E6
AE
BE
EE
FE
F8
F6
45
55
38
48
58
68
78
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
dd
hh ll
ee ff
ff
dd
hh ll
ee ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
ii jj
dd
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
ff
ff
2
3
4
4
3
2
4
5
4
1
1
4
3
5
2
3
4
3
2
4
5
6
5
4
2
3
4
4
3
2
4
5
3
4
2
3
4
4
3
2
4
5
4
1
1
4
3
5