MC908JB8FBE Freescale Semiconductor, MC908JB8FBE Datasheet - Page 166

IC MCU 8K FLASH 3MHZ 44-QFP

MC908JB8FBE

Manufacturer Part Number
MC908JB8FBE
Description
IC MCU 8K FLASH 3MHZ 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JB8FBE

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-QFP
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USB
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Package
44PQFP
Family Name
HC08
Maximum Speed
3 MHz
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
3MHz
Total Internal Ram Size
256Byte
# I/os (max)
37
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Monitor ROM (MON)
10.4.1 Entering Monitor Mode
Technical Data
166
V
V
DD
DD
Notes:
1. PTA3 = 0: Bypasses the divide-by-two prescaler to SIM when using V
2. See
V
V
DD
DD
+ V
+ V
Section 18. Electrical Specifications
HI
HI
(contain
BLANK
BLANK
$FF)
NOT
X
X
Table 10-1. Mode Entry Requirements and Options
X
X
0
1
Table 10-1
specified in the table, monitor mode may be entered after a POR and will
allow communication at 9600 baud provided one of the following sets of
conditions is met:
1. If IRQ = V
2. If IRQ = V
3. If $FFFE & $FFFF is blank (contains $FF):
X
X
0
0
– External clock on OSC1 is 3MHz
– PTA3 = low
– External clock on OSC1 is 6MHz
– PTA3 = high
– External clock on OSC1 is 6MHz
– IRQ = V
X
X
1
1
X
1
1
1
shows the pin conditions for entering monitor mode. As
for V
Monitor ROM (MON)
External Clock,
DD
DD
DD
DD
+ V
+ V
+ V
3MHz
6MHz
6MHz
6MHz
f
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
XCLK
HI
voltage level requirements.
HI
HI
:
:
DD
Frequency,
(f
(f
(f
+ V
XCLK
XCLK
XCLK
(f
3MHz
3MHz
3MHz
3MHz
f
Bus
XCLK
BUS
HI
for monitor mode entry.
÷ 2)
÷ 2)
÷ 2)
)
High-voltage entry to
monitor mode.
9600 baud communication
on PTA0. COP disabled.
Low-voltage entry to
monitor mode.
9600 baud communication
on PTA0. COP disabled.
Enters user mode.
If $FFFE and $FFFF is
blank, MCU will encounter
an illegal address reset.
Freescale Semiconductor
Comments

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