ADUC7024BSTZ62 Analog Devices Inc, ADUC7024BSTZ62 Datasheet - Page 82

• Manufacturer Part Number: ADUC7024BSTZ62
• Description: IC MCU FLASH 62K ANLG I/O 64LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7024BSTZ62

• Core Size: 16/32-Bit
• Program Memory Size: 62KB (62K x 8)
• Design Resources: Sensing Low-g Acceleration Using ADXL345 Digital Accelerometer Connected to ADuC7024 (CN0133)
• Core Processor: ARM7
• Speed: 44MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 30
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 30
• Ram Memory Size: 8KB
• Cpu Speed: 44MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: ADuC7xxx
• Maximum Speed: 44 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 30
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADuC7019/20/21/22/24/25/26/27/28/29
Table 183. T2CON MMR Bit Descriptions
Bit
31:11
10:9
8
7
6
5:4
3:0
Table 184. T2CLRI Register
Name
T2CLRI
T2CLRI is an 8-bit register. Writing any value to this register
clears the Timer2 interrupt.
Timer3 (Watchdog Timer)
Timer3 has two modes of operation: normal mode and
watchdog mode. The watchdog timer is used to recover from
an illegal software state. Once enabled, it requires periodic
servicing to prevent it from forcing a processor reset.
Normal Mode
Timer3 in normal mode is identical to Timer0, except for the
clock source and the count-up functionality. The clock source is
32 kHz from the PLL and can be scaled by a factor of 1, 16, or
256 (see Figure 68).
Value
00
01
10
11
00
01
10
11
0000
0100
1000
1111
0xFFFF034C
Address
Description
Clock source.
External crystal.
External crystal.
Internal oscillator.
Reserved.
Prescale.
Source Clock/16.
Source Clock/32,768.
Reserved.
Core clock (41 MHz/2
Count up. Set by user for Timer2 to count up.
Cleared by user for Timer2 to count down by
default.
Timer2 enable bit. Set by user to enable Timer2.
Cleared by user to disable Timer2 by default.
Timer2 mode. Set by user to operate in
periodic mode. Cleared by user to operate in
free-running mode. Default mode.
Format.
Binary.
Hr: min: sec: Hundredths (23 hours to 0 hour).
Hr: min: sec: Hundredths (255 hours to 0 hour).
Source Clock/1 by default.
Source Clock/256 expected for Format 2 and
Format 3.
0xFF
Default Value
CD
).
Access
W
Rev. C | Page 82 of 96
32.768kHz
Watchdog Mode
Watchdog mode is entered by setting Bit 5 in the T3CON MMR.
Timer3 decreases from the value present in the T3LD register to 0.
T3LD is used as the timeout. The maximum timeout can be
512 sec, using the prescaler/256, and full scale in T3LD. Timer3 is
clocked by the internal 32 kHz crystal when operating in
watchdog mode. Note that to enter watchdog mode success-
fully, Bit 5 in the T3CON MMR must be set after writing to the
T3LD MMR.
If the timer reaches 0, a reset or an interrupt occurs, depending
on Bit 1 in the T3CON register. To avoid reset or interrupt, any
value must be written to T3CLRI before the expiration period.
This reloads the counter with T3LD and begins a new timeout
period.
When watchdog mode is entered, T3LD and T3CON are write-
protected. These two registers cannot be modified until a reset
clears the watchdog enable bit, which causes Timer3 to exit
watchdog mode.
The Timer3 interface consists of four MMRs: T3LD, T3VAL,
T3CON, and T3CLRI.
Table 185. T3LD Register
Name
T3LD
T3LD is a 16-bit register load register.
Table 186. T3VAL Register
Name
T3VAL
T3VAL is a 16-bit read-only register that represents the current
state of the counter.
Table 187. T3CON Register
Name
T3CON
T3CON is the configuration MMR described in Table 188.
PRESCALER
/1, 16 OR 256
Address
0xFFFF0360
Address
0xFFFF0364
Address
0xFFFF0368
Figure 68. Timer3 Block Diagram
COUNTER
UP/DOWN
TIMER3
VALUE
16-BIT
16-BIT
LOAD
Default Value
0x0000
Default Value
0xFFFF
Default Value
0x0000
WATCHDOG
RESET
TIMER3 IRQ
Access
R/W
Access
R
Access
R/W