ATMEGA406-1AAU Atmel, ATMEGA406-1AAU Datasheet - Page 217

IC AVR MCU 40K 1MHZ 48LQFP

ATMEGA406-1AAU

Manufacturer Part Number
ATMEGA406-1AAU
Description
IC AVR MCU 40K 1MHZ 48LQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA406-1AAU

Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
I²C
Peripherals
POR, WDT
Number Of I /o
18
Program Memory Size
40KB (20K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 25 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-30°C ~ 85°C
Package / Case
48-LQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire
Maximum Clock Frequency
1 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 30 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
1MHz
Total Internal Ram Size
2KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5/9/12/15/18/24V
Operating Supply Voltage (max)
25V
Operating Supply Voltage (min)
4V
On-chip Adc
10-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-30C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
AVR MEGA
No. Of I/o's
18
Eeprom Memory Size
512Byte
Ram Memory Size
2KB
Cpu Speed
1MHz
Rohs Compliant
Yes
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA406-1AAU
Manufacturer:
Atmel
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ATMEGA406-1AAU
Manufacturer:
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Table 28-12. JTAG Programming Instruction (Continued)
Notes:
2548E–AVR–07/06
Instruction
7c. Write Lock Bits
7d. Poll for Lock Bit Write complete
8a. Enter Fuse/Lock Bit Read
8b. Read Fuse High Byte
8c. Read Fuse Low Byte
8d. Read Lock Bits
8e. Read Fuses and Lock Bits
9a. Enter Signature Byte Read
9b. Load Address Byte
9c. Read Signature Byte
10a. Enter Calibration Byte Read
10b. Load Address Byte
10c. Read Calibration Byte
11a. Load No Operation Command
1. This command sequence is not required if the seven MSB are correctly set by the previous command sequence (which is
2. Repeat until o = “1”.
3. Set bits to “0” to program the corresponding Fuse, “1” to unprogram the Fuse.
4. Set bits to “0” to program the corresponding Lock bit, “1” to leave the Lock bit unchanged.
5. “0” = programmed, “1” = unprogrammed.
6. The bit mapping for Fuses High byte is listed in
7. The bit mapping for Fuses Low byte is listed in
8. The bit mapping for Lock bits byte is listed in
9. Address bits exceeding PCMSB and EEAMSB
10. All TDI and TDO sequences are represented by binary digits (0b...).
normally the case).
Set (Continued)
(8)
(7)
(6)
a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x
TDI Sequence
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0110011_00000000
0100011_00000100
0111110_00000000
0111111_00000000
0110010_00000000
0110011_00000000
0110110_00000000
0110111_00000000
0111010_00000000
0110010_00000000
0110110_00000000
0110111_00000000
0000011_bbbbbbbb
0110010_00000000
0110011_00000000
0000011_bbbbbbbb
0110110_00000000
0110111_00000000
0100011_00000000
0110011_00000000
0100011_00001000
0100011_00001000
Table 28-1 on page 195
Table 28-4 on page 197
(Table 28-5
Table 28-3 on page 196
and
Table
28-6) are don’t care
TDO Sequence
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ATmega406
Notes
(1)
(2)
(5)
(5)
Fuse High byte
Fuse Low byte
Lock bits
217

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