ADE7566ASTZF8-RL2 AD [Analog Devices], ADE7566ASTZF8-RL2 Datasheet - Page 120

• Manufacturer Part Number: ADE7566ASTZF8-RL2
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

ADE7566/ADE7569
Table 136. SPI Configuration Register SFR (SPIMOD1, 0xE8)
Bit No.
7 to 5
5
4
3
2
1 to 0
Address
0xEF to 0xEE
0xED
0xEC
0xEB
0xEA
0xE9 to 0xE8
Mnemonic
Reserved
INTMOD
AUTO_SS
SS_EN
RxOFW
SPIR[1:0]
Default
0
0
1
0
0
0
Description
Reserved.
SPI Interrupt Mode.
INTMOD
0
1
Master Mode, SS Output Control (see Figure 95).
AUTO_SS
0
1
Slave Mode, SS Input Enable.
When this bit is set to Logic 1, the SS pin is defined as the slave select input pin for the
SPI slave interface.
Receive Buffer Overflow Write Enable.
RxOFW
0
1
Master Mode, SPI SCLK Frequency.
SPIR[1:0]
00
01
10
11
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Result
SPI interrupt set when SPI Rx buffer is full.
SPI interrupt set when SPI Tx buffer is empty.
Result
The SS is held low while this bit is cleared. This allows manual chip select
control using the SS pin.
Single Byte Read or Write. The SS goes low during a single byte transmission
and then returns high.
Continuous Transfer. The SS goes low during the duration of the multibyte
continuous transfer and then returns high.
Result
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte is discarded.
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte overwrites the old data.
Result
f
f
f
f
CORE
CORE
CORE
CORE
/8 = 512 kHz (if f
/16 = 256 kHz (if f
/32 = 128 kHz (if f
/64 = 64 kHz (if f
CORE
CORE
CORE
CORE
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)
Preliminary Technical Data