KM432S2030CT-F10 SAMSUNG [Samsung semiconductor], KM432S2030CT-F10 Datasheet - Page 6

• Manufacturer Part Number: KM432S2030CT-F10
• Description: 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
• Manufacturer: SAMSUNG [Samsung semiconductor]

KM432S2030C
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
Notes :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
Notes :
Operating current
(One bank active)
Precharge standby current
in power-down mode
Precharge standby current
in non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current (Inputs)
Input leakage current (I/O pins)
1. V
2. V
3. Any input 0V
4. Dout is disabled, 0V
5. The VDD condition of KM432S2030C-6 is 3.135V~3.6V.
1. Measured with outputs open.
2. Refresh period is 64ms.
3. KM432S2030CT-G**
4. KM432S2030CT-F**
Parameter
Parameter
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
IH
IL
(min) = -2.0V AC. The undershoot voltage duration is
(max) = 5.6V AC.The overshoot voltage duration is
V
IN
Symbol
I
I
I
I
CC2
CC3
CC2
I
CC3
I
I
I
V
CC2
CC2
CC3
CC3
I
I
I
I
CC1
CC4
CC5
CC6
DDQ
V
NS
NS
OUT
PS CKE & CLK
PS CKE & CLK
P
N
P
N
,
V
Symbol
DD
Burst length = 1
t
I
CKE
CKE
Input signals are changed one time during 30ns
CKE
Input signals are stable
CKE
CKE
Input signals are changed one time during 30ns
CKE
Input signals are stable
I
Page burst
2 Banks activated
t
CKE
RC
OL
OL
RC
V
V
V
V
V
, V
DDQ.
I
I
OH
OL
IL
IL
IH
= 0 mA
= 0 mA
IL
DDQ
t
t
RC
RC
V
V
V
V
V
V
0.2V
(min)
IL
IH
IH
IL
IH
IH
(min)
(max), t
(max), t
(min), CS
(min), CLK
(min), CS
(min), CLK
Test Condition
V
V
IL
IL
(max), t
(max), t
Min
-0.3
-1.5
CC
CC
3.0
2.0
2.4
-1
-
= 15ns
= 15ns
SS
A
V
V
V
V
IH
IH
= 0 to 70 C)
= 0V, T
CC
CC
IL
IL
(min), t
(min), t
(max), t
(max), t
- 6 -
3ns.
=
=
3ns.
A
CC
CC
= 0 to 70 C)
Typ
CC
CC
3.3
3.0
0
-
-
-
-
= 15ns
= 15ns
=
=
Latency
CAS
3
2
3
2
3
2
V
DDQ
Max
140
200
200
3.6
0.8
0.4
1.5
-6
-
-
-
1
-
+0.3
130
180
180
-7
Version
-
-
-
450
20
10
30
20
2
2
3
3
2
130
130
150
130
160
160
-8
Unit
uA
uA
REV. 1.1 Mar. '99
CMOS SDRAM
V
V
V
V
V
115
115
130
110
150
150
-10
Unit Note
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
I
I
OH
OL
Note
= -2mA
= 2mA
3,4
1
1
2
3
4
1
2
3