S71GL256NB0 SPANSION [SPANSION], S71GL256NB0 Datasheet - Page 96

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S71GL256NB0

Manufacturer Part Number
S71GL256NB0
Description
Stacked Multi-chip Product (MCP)
Manufacturer
SPANSION [SPANSION]
Datasheet
Erase And Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 10,000 cycles, 25°C, 3.0 V V
2. Under worst case conditions of 100,000 cycles, 90°C, V
3. Effective write buffer specification is based upon a 16-word write buffer operation.
4. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
5. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
TSOP Pin and BGA Package Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
96
Parameter
Sector Erase Time
Chip Erase Time
Total Write Buffer Time
(Note 3)
Total Accelerated Effective
Write Buffer Programming
Time (Note 3)
Chip Program Time
Parameter Symbol
pattern.
words program faster than the maximum program times listed.
command. See Table 17 for further information on command definitions.
C
C
C
OUT
IN2
IN
A
= 25°C, f = 1.0 MHz.
Parameter Description
Control Pin Capacitance
Output Capacitance
Input Capacitance
S29GL128N
S29GL256N
S29GL512N
S29GL128N
S29GL256N
S29GL512N
S29GLxxxN MirrorBit
A d v a n c e
(Note 1)
TBD
TBD
TBD
TBD
Typ
TBD
TBD
TBD
TBD
TBD
CC
V
V
V
OUT
IN
IN
= 3.0 V.
TM
Flash Family
I n f o r m a t i o n
= 0
= 0
= 0
Test Setup
(Note 2)
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TSOP
TSOP
TSOP
Unit
sec
sec
sec
µs
µs
Typ
8.5
7.5
prior to erasure (Note 5)
6
Excludes system level
S29GLxxxN_00_A4 June 14, 2004
overhead (Note 6)
programming
Excludes 00h
CC
Comments
Max
7.5
12
, checkerboard
9
Unit
pF
pF
pF

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