S71GL256NB0 SPANSION [SPANSION], S71GL256NB0 Datasheet - Page 146

• Manufacturer Part Number: S71GL256NB0
• Description: Stacked Multi-chip Product (MCP)
• Manufacturer: SPANSION [SPANSION]

Notes:
1. The all address inputs must be High from Cycle #1 to #5.
2. The address key must confirm the format specified in page 129. If not, the operation and data are not guaranteed.
3. After t
146
ADDRESS
LB#, UB#
DQ*
CE1#
WE#
OE#
CP
3
following Cycle #6, the Power Down Program is completed and returned to the normal operation.
Cycle #1
MSB*
t
RC
Figure 52. Power Down Program Timing (for 32M/64M Only)
RDa
1
t
CP
Cycle #2
MSB*
t
WC
RDa
1
t
A d v a n c e
CP
Cycle #3
MSB*
pSRAM Type 7
t
WC
RDa
1
t
CP
I n f o r m a t i o n
Cycle #4
MSB*
t
WC
X
1
t
CP
Cycle #5
MSB*
t
WC
X
1
t
CP
pSRAM_Type07_13_A0 May 4, 2004
Cycle #6
Key*
t
RC
RDb
2
t
CP
*
3