XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 94

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Parallel Input/Output
7.4.6 PB4/AN4/TCMP/CMP1 Logic
Advance Information
94
WRITE $0011
WRITE $0001
WRITE $0005
READ $0005
RESET
READ $0001
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit
(TIMER OUTPUT COMPARE)
The PB4/AN4/TCMP/CMP1 pin can be used as a simple I/O port pin, be
controlled by the OLVL bit from the output compare function of the 16-bit
programmable timer, or be controlled directly by the output of
comparator 1 as shown in
timer OLVL bit, and the output of comparator 1 are all logically ORed
together to drive the pin. Also, the analog subsystem input channel 4
multiplexer is connected directly to this pin. The operations of PB4 pin
are summarized in
(COMPARATOR 1 OUT)
4. If interaction between the port logic and the other module is not
R
R
PORT BDATA
desired, the pin should be configured as an input by clearing the
appropriate DDRB bit. The input pulldown device is disabled by
clearing the appropriate PDRB bit (or by disabling programmable
pulldowns with the SWPDI bit in the MOR).
REGISTER
DATA DIRECTION
BIT PB4
REGISTER B
REGISTER B
PULLDOWN
BIT DDRB4
BIT PDIB4
CMP1
OLVL
Parallel Input/Output
Table
COP REGISTER ($1FF0)
7-2.
Figure
MASK OPTION REG. ($1FF1)
MC68HC705JJ7 • MC68HC705JP7 — REV 4
7-9. The PB4 data, the programmable
TIMER OUTPUT COMPARE
ANALOG SUBSYSTEM
INPUT AN4 AND
PULLDOWN
DEVICE
SOURCE CURRENT
TCMP
PB4
AN4
CAPABILITY
HIGH SINK/
MOTOROLA