XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 119

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

8.5 Analog Status Register
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Address:
The analog status register (ASR) contains status and control of the
comparator flag bits. These bits in the ASR are shown in
the bits in this register are cleared by a reset of the device.
CPF2
CPF1
Reset:
Read:
Write:
This read-only flag bit is edge sensitive to the rising output of
comparator 2. It is set when the voltage on the PB0/AN0 pin rises
above the voltage on a sample capacitor which creates a positive
edge on the output of comparator 2, regardless of the state of the INV
bit in the AMUX register. This bit is reset by writing a logic 1 to the
CPFR2 reset bit in the ASR. This bit is cleared by a reset of the
device.
This read-only flag bit is edge sensitive to the rising output of
comparator 1. It is set when the voltage on the PB2/AN2 pin rises
above the voltage on the PN3/AN3/TCAP pin which creates a positive
edge on the output of comparator 1, regardless of the state of the INV
bit in the AMUX register. This bit is reset by writing a logic 1 to the
CPFR1 reset bit in the ASR. This bit is cleared by a reset of the
device.
1 = A positive transition on the output of comparator 2 has occurred
0 = A positive transition on the output of comparator 2 has not
1 = A positive transition on the output of comparator 1 has occurred
0 = A positive transition on the output of comparator 1 has not
$001E
CPF2
Bit 7
since the last time the CPF2 flag has been cleared.
occurred since the last time the CPF2 flag has been cleared.
since the last time the CPF1 flag has been cleared.
occurred since the last time the CPF1 flag has been cleared.
0
Figure 8-6. Analog Status Register (ASR)
= Unimplemented
Analog Subsystem
CPF1
6
0
CPFR2
5
0
0
CPFR1
4
0
0
COE1
R
3
0
= Reserved
VOFF
2
0
Analog Status Register
Advance Information
Analog Subsystem
Figure
CMP2
1
0
8-6. All
CMP1
Bit 0
R
0
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