XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 186

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

EPROM/OTPROM
Advance Information
186
CAUTION:
Address:
Erased:
Reset:
SWPDI — Software Pulldown Inhibit Bit
DELAY — Stop Startup Delay Bit
The 16-cycle delay option will work properly in devices with the internal
low-power oscillator or with a steady external clock source. Check
crystal/ceramic resonator specifications carefully before using the
16-cycle delay option with a crystal or ceramic resonator.
OSCRES — Oscillator Resistor Bit
Read:
Write:
6. Port A external interrupt function (enable or disable)
7. IRQ trigger sensitivity (edge-triggered only or both edge- and
8. COP watchdog (enable or disable)
This EPROM bit inhibits software control of the port A and port B
pulldown devices.
This EPROM bit selects the number of bus cycles that must elapse
before bus activity begins following a restart from the stop mode.
This EPROM bit configures the internal shunt resistor.
1 = Software pulldown inhibited
0 = Software pulldown enabled
1 = Startup delay is 4064 bus cycles.
0 = Startup delay is 16 bus cycles.
1 = Oscillator configured with 2 M¾ shunt resistor
0 = Oscillator configured without a shunt resistor
level-triggered)
SWPDI
$1FF1
Bit 7
0
Figure 13-2. Mask Option Register (MOR)
DELAY
EPROM/OTPROM
6
0
OSCRES
5
0
Unaffected by reset
SWAIT
MC68HC705JJ7 • MC68HC705JP7 — REV 4
4
0
LVREN
3
0
PIRQ
2
0
LEVEL
1
0
MOTOROLA
COPEN
Bit 0
0