XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 172
XC68HC705JJ7
Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705JJ7.pdf
(242 pages)
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Programmable Timer
Advance Information
172
Address:
Writing to any of the bits in the TSR has no effect. Reset does not
change the state of any of the flag bits in the TSR.
ICF — Input Capture Flag
OCF — Output Compare Flag
TOF — Timer Overflow Flag
Reset:
Read:
Write:
The ICF bit is automatically set when an edge of the selected polarity
occurs on the TCAP pin. Clear the ICF bit by reading the timer status
register with the ICF set, and then reading the low byte (ICRL, $0015)
of the input capture registers. Resets have no effect on ICF.
The OCF bit is automatically set when the value of the timer registers
matches the contents of the output compare registers. Clear the OCF
bit by reading the timer status register with the OCF set and then
accessing the low byte (OCRL, $0017) of the output compare
registers. Resets have no effect on OCF.
The TOF bit is automatically set when the 16-bit timer counter rolls
over from $FFFF to $0000. Clear the TOF bit by reading the timer
status register with the TOF set and then accessing the low byte
(TMRL, $0019) of the timer registers. Resets have no effect on TOF.
$0013
Bit 7
ICF
U
Figure 11-11. Timer Status Register (TSR)
Programmable Timer
= Unimplemented
OCF
U
6
TOF
U
5
MC68HC705JJ7 • MC68HC705JP7 — REV 4
4
0
0
U = Unaffected
3
0
0
2
0
0
1
0
0
MOTOROLA
Bit 0
0
0
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