txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 8

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

PIN DESCRIPTIONS
POWER SUPPLY AND GROUND
*Note: I = Input; O = Output; P = Power
140 MBIT/S LINE INTERFACE
*Note: See Input, Output and I/O Parameters section for Type definitions.
Symbol
Symbol
EXLOS
(n=7-0)
(n=7-0)
RXCO
RXDn
TXDn
RXCI
GND
VDD
TXC
NIB
76, 88, 100, 112, 124, 136
10, 22, 34, 46, 58, 70, 82,
4, 16, 28, 40, 52, 54, 64,
Pin No.
84, 83,
94, 106, 118, 130, 142
81-77,
33-29
27-25
87
75
85
23
21
74
Pin No.
I/O/P
O
O
I
I
I
I
I
TTL4mA
TTL4mA
Type*
TTLp
TTL
TTL
TTL
TTL
I/O/P*
P
P
Transmit 140 Mbit/s Line Clock: The clock rate is 34.816 MHz
(nibble rate), or 17.408 MHz (byte rate). Byte or nibble-wide line
data is clocked into the L4M on positive transitions of this clock
when control bit TINVC is a 0. Data is clocked in on negative
transitions of this clock when control bit TINVC is a 1.
Transmit 140 Mbit/s Line Data: TXD7 (pin 84) is defined as
the MSB for the byte interface, and is the first bit transmitted.
For the nibble interface, TXD3 (pin 79) is defined as the MSB.
TXD0 (pin 75) is the LSB for both the byte and nibble interfaces.
External 140 Mbit/s Loss of Signal: An optional low input sig-
nal to report an external transmit 140 Mbit/s line loss of signal.
If this lead is not used it must be connected to VDD.
Receive 140 Mbit/s Line Data: RXD7 (pin 33) is defined as the
MSB for the byte interface, and is the first bit received. For the
nibble interface, RXD3 (pin 29) is defined as the MSB. RXD0
(pin 25) is the LSB for both the byte and nibble interfaces.
Receive 140 Mbit/s Line Output Clock: The clock rate is
34.816 MHz (nibble rate), or 17.408 MHz (byte rate). Byte or
nibble-wide line data is clocked out of the L4M on negative tran-
sitions of this clock when control bit RINVC is a 0. Data is
clocked out on positive transitions of this clock when control bit
RINVC is a 1. This clock is derived from the receive line input
clock (RXCI).
Receive 140 Mbit/s Line Input Clock: Byte (17.408 MHz) or
nibble (34.816 MHz) clock used by the internal desynchronizer
for sourcing data. This clock is used to derive the receive line
output clock (RXCO).
Nibble/Byte Data Selection: Common control lead for both the
transmit and receive 140 Mbit/s interfaces. A high selects the
interfaces as nibble, while a low selects the interfaces as byte.
DATA SHEET
- 8 -
Type
VDD: +5 volt supply voltage,
Ground: 0 volt reference.
Name/Function
Name/Function
Ed. 1A, January 2000
5%
TXC-03456
TXC-03456-MB
L4M