txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 61

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Overhead Communication Channel Interface
The 139.264 Mbit/s format has ten overhead communication channel bits ("O"-bits) per subframe or 90 bits per
frame. The "O"-bit receive and transmit interfaces are treated as an asynchronous serial data communications
channel.
In the transmit direction, the "O"-bit interface consists of an output clock (TOCHC) and data input lead
(TOCHD). Data is clocked into the 140 Mbit/s Mapper on positive transitions of the clock. The clock is non-sym-
metrical.
In the receive direction, the interface consists of an output clock (ROCHC) and data output signal (ROCHD).
Data is clocked out of the L4M on negative transitions of the clock. The clock is non-symmetrical.
Path Overhead Interface
In the transmit direction, timing is provided for clocking in the nine POH bytes. The insertion of POH data from
the POH interface is disabled when an active low is placed on the POHDIS lead. When enabled, the transmit
POH interface B3 byte position is masked out by the L4M. A B3 test byte may be written by the microprocessor
into the L4M RAM and transmitted in place of the calculated B3 byte, or it may function as a B3 error mask. A
transmit non-symmetrical clock (TPOHC) and framing pulse (TPOHF) are provided for sourcing the Path Over-
head bytes (TPOHD) from the external circuitry. The framing pulse is one clock cycle wide and occurs in the
first bit time of the J1 byte.
In the receive direction all nine Path Overhead bytes are clocked out at the POH interface. The receive timing is
asynchronous in relationship to transmit timing. A receive clock (RPOHC) and framing pulse (RPOHF) are pro-
vided for outputting the Path Overhead bytes (RPOHD) for external circuitry. The framing pulse is one clock
cycle wide and occurs in the first bit time of the J1 byte.
DATA SHEET
- 61 -
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
L4M