TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 20

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Symbol Name
DFMCR0
DFMCR1
Limitation point on the use of DFM
Please refer to 3.3.5 “Clock Doubler (DFM)” for the details .
1.
2.
3.
DFM
control
register 0
DFM
control
register 1
It’s prohibited to execute DFM enable/disable control in the SLOW mode (fs)
(Write to DFMCR0<ACT1:0> = “10”). You should control DFM in the NORMAL mode.
If you stop DFM operation during using DFM (DFMCR0<ACT1:0> = “10”), you shouldn’t
execute that change the clock f
the above executions should be separated into two procedures as showing below.
If you stop high-frequency oscillator during using DFM (DFMCR0<ACT1:0> = “10”), you
should stop DFM before you stop high-frequency oscillator.
E8H
E9H
Address
LD
LD
00
01
10
11
ACT1
STOP
RUN
RUN
RUN
(DFMCR0), C0H
(DFMCR0), 00H
R/W
R/W
DFM
D7
7
0
0
STOP
RUN
STOP
STOP
LUP
Figure 3.3.4 SFR for DFM
ACT0
R/W
R/W
f
f
f
f
OSCH
OSCH
DFM
OSCH
D6
6
select
0
0
f
FPH
Input frequency 4 to 9 MHz (at 2.7 V to 3.6 V): Write 0BH
DFM
91C820A-18
Lockup
status flag
0: End
1: Not end
DLUPFG
to f
R/W
D5
5
R
0
0
OSCH
;
;
Change the clock f
DFM stop.
Lockup
time
0:
1:
DLUPTM
and stop the DFM at the same time. Therefore
2
2
R/W
R/W
12
10
D4
DFM revision
4
0
/f
/f
1
OSCH
OSCH
R/W
D3
DFM
3
0
to f
OSCH
R/W
D2
2
0
.
R/W
D1
1
1
TMP91C820A
2008-02-20
R/W
D0
0
1