TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 171

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
(2) Mode 1 (7-bit UART mode)
(3) Mode 2 (8-bit UART mode)
SC0MOD0<SM1:0> field to 01.
the setting of the serial channel control register SC0CR<PE> bit; whether even parity
or odd parity will be used is determined by the SC0CR<EVEN> setting when
SC0CR<PE> is set to 1 (Enabled).
parity bit can be added (Use of a parity bit is enabled or disabled by the setting of
SC0CR<PE>); whether even parity or odd parity will be used is determined by the
SC0CR<EVEN> setting when SC0CR<PE> is set to 1 (Enabled).
Example: When transmitting data of the following format, the control registers should
Example: When receiving data of the following format, the control registers should be
SC0MOD
SC0CR
BR0CR
INTES0
SC0BUF
PCCR
PCFC
X: Don’t care, −: No change
7-bit UART mode is selected by setting the serial channel mode register
In this mode a parity bit can be added. Use of a parity bit is enabled or disabled by
8-bit UART mode is selected by setting SC0MOD0<SM1:0> to 10. In this mode a
Start
Transmission direction (Transmission rate: 9600 bps at fc = 12.288 MHz)
* Clock state
be set as described below. This explanation applies to channel 0.
set as described below.
Bit0
← X 0 − X 0 1 0 1
← X 1 1 X X X 0 0
← 0 0 1 0 0 1 0 1
← 1 1 0 0 − − − −
← * * * * * * * *
← − − − − − − − 1
← − − − − − − − 1
7 6 5 4 3 2 1 0
Start
1
Transmission direction (Transmission rate: 2400 bps at fc = 12.288 MHz)
Bit0
2
91C820A-169
3
1
4
2
Set PC0 to function as the TXD0 pin.
Select 7-bit UART mode.
Add even parity.
Set the transfer rate to 2400 bps.
Enable the INTTX0 interrupt and set it to interrupt level 4.
Set data for transmission.
System clock:
Clock gear:
Prescaler clock: System clock
5
3
6
4
7
5
High frequency (fc)
1 (fc)
parity Stop
Odd
6
parity Stop
Even
TMP91C820A
2008-02-20

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