TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 97

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

7.5
7.5.1
External
interrupt
pin
priate settings must be made in the clock generator.
7.5.1.1
7.5.1.2
Interrupts
This chapter describes routes, sources and required settings of interrupts.
The CPU is notified of interrupt requests by the interrupt signal from each interrupt source.
It sets priority on interrupts and handles an interrupt request with the highest priority.
Interrupt requests for clearing a standby mode are notified to the CPU via the clock generator. Therefore, appro-
Interrupt Sources
the CPU (route1).
rupt pin (route 3) are input to the clock generator and are input to the CPU through the logic for releas-
ing standby (route 4 and 5).
the CPU, not through the logic for standby release (route 6).
source or by setting the NVIC's Interrupt Set-Pending Register.
Figure 7-1 shows an interrupt request route.
The interrupts issued by the peripheral function that is not used to release standby are directly input to
The peripheral function interrupts used to release standby (route 2) and interrupts from the external inter-
If interrupts from the external interrupt pins are not used to release standby, they are directly input to
An interrupt request is generated from an external pin or peripheral function assigned as an interrupt
Interrupt route
Generation
Port
Peripheral
function
Peripheral
function
Figure 7-1 Interrupt Route
Page 71
standby
Clock generator
Exiting
mode
<INTxEN>
0
1
Interrupt request
TMPM364F10FG
CPU