TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 499

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TMPM364F10FG

Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM364F10FG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM364F10FG
Manufacturer:
Toshiba
Quantity:
10 000
Company:
Part Number:
TMPM364F10FG
Quantity:
6 000
Table 14-2 Processing in Slave Mode
<TRX>
1
0
<AL>
1
0
1
0
<AAS>
1
1
0
1
0
1
0
<AD0>
1/0
1/0
1/0
0
0
0
0
Arbitration Lost is detected while the slave address
was being transmitted and the SBI received a slave
address with the direction bit "1" transmitted by an-
other master.
In the slave receiver mode, the SBI received a
slave address with the direction bit "1" transmitted
by the master.
In the slave transmitter mode, the SBI has comple-
ted a transmission of one data word.
Arbitration Lost is detected while a slave address is
being transmitted, and the SBI receives either a
slave address with the direction bit "0" or a general-
call address transmitted by another master.
Arbitration Lost is detected while a slave address
or a data word is being transmitted, and the trans-
fer is terminated.
In the slave receiver mode, the SBI received either
a slave address with the direction bit "0" or a general-
call address transmitted by the master.
In the slave receiver mode, the SBI has completed
a reception of a data word.
State
Page 473
Set the number of bits in a data word to <BC[2:0]>
and write the transmit data into SBIxDBR.
Test LRB. If it has been set to "1", that means the re-
ceiver does not require further data. Set <PIN> to 1
and reset <TRX> to 0 to release the bus. If <LRB>
has been reset to "0", that means the receiver re-
quires further data. Set the number of bits in the da-
ta word to <BC[2:0]> and write the transmit data to
the SBIxDBR.
Read the SBIxDBR (a dummy read) to set <PIN>
to 1, or write "1" to <PIN>.
Set the number of bits in the data word to <BC
[2:0].> and read the received data from SBIxDBR.
Processing
TMPM364F10FG

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