TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 567

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

16.4.13
31-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
Table 16-1 Change of RMP and RML Registers Before / After a Message i Received
match
Match
CANRMP<RMPx> bit from the CPU. The <RMPx> bit is also cleared at the same time. A write of "1" or
"0" to the <RMLx> bit from the CPU is invalid.
<RMLx> bit in the receive message lost register CANRML is set to "1". In this case, mailbox x is overwrit-
ten with the new received message.
abort interrupt is enabled by setting the <TRMABM> bit in the global interrupt mask register CANGIM to
"1", the CAN global interrupt INTCANGB occurs.
mask register CANGIM to "1", the CAN global interrupt INTCANGB occurs.
ceived.
No
ID
RML31 to
RML0
The CANRML<RMLx> bit is set by the internal logic and can be cleared with a write of "1" to the
With the CANRMP<RMPx> bit set to "1", if mailbox x receives the next message, the corresponding
When the <TRMABF> bit in the global interrupt flag register CANGIF is also set to "1", and the transmit
When the receive message lost interrupt is enabled by setting the <RMLIM> bit in the global interrupt
Table 16-1 shows the changes of the CANRMP and CANRML registers before and after a message is re-
Bit Symbol
CANRML (Receive Message Lost Register)
Don't care
RML31
RML23
RML15
RML7
<RMPx>
31
23
15
Before Reception
0
0
0
7
0
0
1
1
R/W
Type
Don't care
<RMLx>
RML30
RML22
RML14
0
0
1
RML6
30
22
14
0
0
0
6
0
Receive message lost (Each bit corresponds with mailboxes 31 to 0.)
When mailbox x for which the <RMPx> bit is set to "1" receives the next message, the content of the re-
ceived message is overwritten to the mailbox x, and the <RMLx> bit is set to "1".
A write of "1" to the <RMPx> bit can clear the <RMLx> bit.
Don't care
<RMPx>
After reception
1
1
1
RML29
RML21
RML13
RML5
29
21
13
0
0
0
5
0
Don't care Received message are not stored in any mailboxes.
<RMLx>
0
1
1
Page 541
RML28
RML20
RML12
The received message is stored in mailbox x with a matching ID.
The received message is overwritten in mailbox x with a matching ID.
This shows that the previous message was lost.
RML4
28
20
12
0
0
0
4
0
RML27
RML19
RML11
RML3
27
19
11
Function
0
0
0
3
0
Operation
RML26
RML18
RML10
RML2
26
18
10
0
0
0
2
0
RML25
RML17
RML9
RML1
25
17
0
0
9
0
1
0
TMPM364F10FG
RML24
RML16
RML8
RML0
24
16
0
0
8
0
0
0