AT32UC3L064 Atmel Corporation, AT32UC3L064 Datasheet - Page 831

• Manufacturer Part Number: AT32UC3L064
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L064

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

36. Datasheet Revision History
36.1
36.2
36.3
32099G–06/2011
Rev. G - 06/2011
Rev. F- 11/2010
Rev. E- 10/2010
Please note that the referring page numbers in this section are referred to this document. The
referring revision in this section are referring to the document revision.
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FLASHCDW: FSR register is a Read-only register. Added info about QPRUP
PM: Clarified POR33 masking requirements before shutdown. Added more info about wakeup
sources. Added AWEN description. PPCR register reset value corrected.
SAU: SR.IDLE definition and reset value corrected.
DFLL: Open- and closed-loop operation clarified.
OSC32: Added note about OSC32RDY bit not always cleared when disabling OSC32.
USART: Major cleanup.
Features: Removed superfluous R mark.
Package and Pinout, GPIO function multiplexing:TWIMS0-TWCK on PA20 removed. ADCIFB-
AD[3] on PA17 removed, number of ADC channels are 8, not 9. These were removed from rev.
C, but reappeared in rev. E.
Overview: Added missing signals in block diagram.
Package and pinout: Added note about TWI, SMBUS and 5V tolerant pads in peripheral
multiplexing. Added CAT DIS signal to signal descriptions. Removed TBD on ADVREFP
minimum voltage.
Memories: Added SAU slave address to physical memory map.
Supply and startup considerations: VDDIN is using GND as ground pin. Clarified references to
PORs in startup considerations.
FLASHCDW: Added serial number location to module configuration section.
PM: Added more info about the WAKE_N pin. Added info about CLK_PM, Updated the
selection main clock source section.
SCIF: Major chapter update.
AST: Updated digital tuner formula and conditions.
GPIO: Updated GPER reset value and added more registers with non-zero reset value.
CAT: Added info about VDIVEN and discharge current formula.
ADCIFB: Fixed Sample and Hold time formula.
GLOC: Added info about pullup control and renamed LUTCR register to CR.
AT32UC3L016/32/64
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