AT32UC3L064 Atmel Corporation, AT32UC3L064 Datasheet - Page 752
AT32UC3L064
Manufacturer Part Number
AT32UC3L064
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L016.pdf
(843 pages)
4.AT32UC3L016.pdf
(110 pages)
Specifications of AT32UC3L064
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3L016 PDF datasheet #3
- AT32UC3L016 PDF datasheet #4
- Current page: 752 of 843
- Download datasheet (13Mb)
31.6.5.1
31.6.5.2
31.6.5.3
31.6.5.4
31.6.6
31.6.6.1
Table 31-31. aWire Packet Format
32099G–06/2011
Field
COMMAND/
RESPONSE
SYNC
Functional Description
I/O Lines
Power Management
Clocks
External Components
aWire Communication Protocol
Number of bytes
1
1
The pin used by AW is multiplexed with the RESET_N pin. The reset functionality is the default
function of this pin. To enable the aWire functionality on the RESET_N pin the user must enable
the AW either by sending the enable sequence over the RESET_N pin from an external aWire
master or by enabling the aWire user interface.
In 2-pin mode data is received on the RESET_N line, but transmitted on the DATAOUT line.
After sending the 2_PIN_MODE command the DATAOUT line is automatically enabled. All other
peripheral functions on this pin is disabled.
When debugging through AW the system clocks are automatically turned on to allow debugging
in sleep modes.
The aWire UART uses the internal 120 MHz RC oscillator (RC120M) as clock source for its
operation. When enabling the AW the RC120M is automatically started.
The AW needs an external pullup on the RESET_N pin to ensure that the pin is pulled up when
the bus is not driven.
The AW is accessed through the RESET_N pin shown in
communicates through a UART operating at variable baud rate (depending on a sync pattern)
with one start bit, 8 data bits (LSB first), one stop bit, and no parity bits. The aWire protocol is
based upon command packets from an externalmaster and response packets from the slave
(AW). The master always initiates communication and decides the baud rate.
The packet contains a sync byte (0x55), a command/response byte, two length bytes (optional),
a number of data bytes as defined in the length field (optional), and two CRC bytes. If the com-
mand/response has the most significant bit set, the command/response also carries the optional
length and data fields. The CRC field is not checked if the CRC value transmitted is 0x0000.
Description
Sync pattern (0x55).
Command from the master or
response from the slave.
Comment
Used by the receiver to set the baud rate
clock.
When the most significant bit is set the
command/response has a length field. A
response has the next most significant bit
set. A command does not have this bit set.
AT32UC3L016/32/64
Table 31-30 on page
751. The AW
Optional
No
No
752
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