AT32UC3L064 Atmel Corporation, AT32UC3L064 Datasheet - Page 389

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AT32UC3L064

Manufacturer Part Number
AT32UC3L064
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3L064

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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19.7.1
Name:
Access Type:
Offset:
Reset Value:
• LINWKUP: Send LIN Wakeup Signal
• LINABT: Abort LIN Transmission
• RTSDIS/RCS: Request to Send Disable/Release SPI Chip Select
• RTSEN/FCS: Request to Send Enable/Force SPI Chip Select
• RETTO: Rearm Time-out
• RSTNACK: Reset Non Acknowledge
• SENDA: Send Address
• STTTO: Start Time-out
32099G–06/2011
RETTO
TXDIS
31
23
15
7
Writing a zero to this bit has no effect.
Writing a one to this bit will sends a wakeup signal on the LIN bus.
Writing a zero to this bit has no effect.
Writing a one to this bit will abort the current LIN transmission.
Writing a zero to this bit has no effect.
Writing a one to this bit when USART is not in SPI master mode drives RTS pin high.
Writing a one to this bit when USART is in SPI master mode releases NSS (RTS pin).
Writing a zero to this bit has no effect.
Writing a one to this bit when USART is not in SPI master mode drives RTS low.
Writing a one to this bit when USART is in SPI master mode when;
FCS=0: has no effect.
FCS=1: forces NSS (RTS pin) low, even if USART is not transmitting, in order to address SPI slave devices supporting the
CSAAT Mode (Chip Select Active After Transfer).
Writing a zero to this bit has no effect.
Writing a one to this bit reloads the time-out counter and clears CSR.TIMEOUT.
Writing a zero to this bit has no effect.
Writing a one to this bit clears CSR.NACK.
Writing a zero to this bit has no effect.
Writing a one to this bit will in multidrop mode send the next character written to THR as an address.
Writing a zero to this bit has no effect.
Writing a one to this bit will abort any current time-out count down, and trigger a new count down when the next character has
been received. CSR.TIMEOUT is also cleared.
Control Register
RSTNACK
TXEN
30
22
14
CR
Write-only
0x0
0x00000000
6
LINWKUP
RXDIS
29
21
13
5
LINABT
SENDA
RXEN
28
20
12
4
RTSDIS/RCS
STTTO
RSTTX
27
19
11
3
RTSEN/FCS
STPBRK
RSTRX
26
18
10
2
AT32UC3L016/32/64
STTBRK
25
17
9
1
RSTSTA
24
16
8
0
389

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