71M6543F-IGT/F Maxim Integrated Products, 71M6543F-IGT/F Datasheet - Page 58

• Manufacturer Part Number: 71M6543F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6543F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 51
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-100
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bit Banged Optical UART (Third UART)
As shown in
in a bit banged configuration. When control bit OPT_BB (I/O RAM 0x2022[0]) is set, the optical port is
71M6543F/H and 71M6543G/GH Data Sheet
OPT_TXE[1:0] field allows the MPU to select VPULSE, WPULSE, SEGDIO51 or the output of the pulse
modulator to be sourced onto the OPT_TX pin. Likewise, the OPT_RX pin can alternately be configured
as SEGDIO55, and its control is OPT_RXDIS (I/O RAM 0x2457[2]) and LCD_MAP[55] (I/O RAM 0x2405[4]).
driven by DIO5 and the SEGDIO5 pin is driven by UART1_TX. This configuration is typically used when
the two dedicated UARTs must be connected to high speed clients and a slower optical UART is
permissible.
2.5.10 Digital I/O and LCD Segment Drivers
2.5.10.1 General Information
The 71M6543 combines most DIO pins with LCD segment drivers. Each SEG/DIO pin can be configured
as a DIO pin or as a segment driver pin (SEG).
On reset or power-up, all DIO pins are DIO inputs (except for SEGDIO0-15, see caution note below) until
they are configured as desired under MPU control. The pin function can be configured by the I/O RAM
registers LCD_MAPn (0x2405 – 0x240B). Setting the bit corresponding to the pin in LCD_MAPn to 1
configures the pin for LCD, setting LCD_MAPn to 0 configures it for DIO.
58
from
OPT_TX UART
A
B
Figure
OPT_TXMOD = 0
OPT_TXINV
15, the 71M6543 can also be configured to drive the optical UART with a DIO signal
UART1_TX
DIO5
OPT_BB
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0
1
0
1
UART1_RX
OPT_TXINV
OPT_TXMOD=0
Figure 15: Optical Interface (UART1)
OPT_TXMOD
OPT_TXMOD
DIO55
OPT_FDC
OPT_FDC
Figure 14: Optical Interface
A
OPT_RXDIS
1
0
EN
MOD
A
2
DUTY
VARPULSE
EN
WPULSE
DIO51
B
MOD
2
DUTY
2
0
3
1
VARPULSE
OPT_TXE[1:0]
A
B
B
WPULSE
A
SEG55
SEG51
SEG5
DIO2
OPT_FDC=2 (25%)
OPT_TXMOD=1,
B
LCD_MAP[51]
LCD_MAP[5]
OPT_FDC = 2 (25%)
LCD_MAP[55]
1
0
1
0
OPT_TXMOD = 1,
1
0
OPT_TXE[1:0]
1/38kHz
Internal
0
3
2
1
SEGDIO55/
OPT_RX
SEGDIO51/
OPT_TX
SEGDIO5/TX2
1/38kHz
Internal
V3P3
OPT_TX
V3P3
v1.2