71M6543F-IGT/F Maxim Integrated Products, 71M6543F-IGT/F Datasheet - Page 42

• Manufacturer Part Number: 71M6543F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6543F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 51
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-100
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

71M6543F/H and 71M6543G/GH Data Sheet
External MPU Interrupts
The seven external interrupts are the interrupts external to the 80515 core, i.e. signals that originate in
other parts of the 71M6543, for example the CE, DIO, RTC, or EEPROM interface.
The external interrupts are connected as shown in
programmable in the MPU via the I3FR and I2FR bits in T2CON (SFR 0xC8). Interrupts 2 and 3 should
be programmed for falling sensitivity (I3FR = I2FR = 0). The generic 8051 MPU literature states that
interrupts 4 through 6 are defined as rising-edge sensitive. Thus, the hardware signals attached to
interrupts 5 and 6 are inverted to achieve the edge polarity shown in
External interrupt 0 and 1 can be mapped to pins on the device using DIO resource maps. See
Digital I/O
42
T2CON[4:0]
Interrupt
External
T2CON[7]
T2CON[6]
T2CON[5]
IRCON[7]
IRCON[6]
IRCON[5]
IRCON[4]
IRCON[3]
IRCON[2]
IRCON[1]
IRCON[0]
0
1
2
3
4
5
6
Bit
Bit
TF0 and TF1 (Timer 0 and Timer 1 overflow flags) is automatically cleared by hardware when the
service routine is called (Signals T0ACK and T1ACK – port ISR – active high when the service
routine is called).
for more information.
Digital I/O
Digital I/O
CE_PULSE
CE_BUSY
VSTAT (VSTAT[2:0] changed)
EEPROM busy (falling), SPI (rising)
XFER_BUSY (falling), RTC_1SEC, RTC_1MIN, RTC_T
Symbol
Symbol
I3FR
I2FR
IEX6
IEX5
IEX4
IEX3
IEX2
–
–
–
–
–
Not used.
Polarity control for INT3:
Polarity control for INT2:
Not used.
Not used
Not used
1 = External interrupt 6 occurred and has not been cleared.
1 = External interrupt 5 occurred and has not been cleared.
1 = External interrupt 4 occurred and has not been cleared.
1 = External interrupt 3 occurred and has not been cleared.
1 = External interrupt 2 occurred and has not been cleared.
Not used.
Table 30: The T2CON Bit Functions (SFR 0xC8)
Table 31: The IRCON Bit Functions (SFR 0xC0)
© 2008–2011 Teridian Semiconductor Corporation
0 = falling edge.
1 = rising edge.
0 = falling edge.
1 = rising edge.
Table 32: External MPU Interrupts
Connection
Table
32. The polarity of interrupts 2 and 3 is
Function
Function
Table
see
see
rising
falling
rising
falling
32.
Polarity
2.5.10
2.5.10
Flag Reset
automatic
automatic
automatic
automatic
automatic
automatic
manual
2.5.10
v1.2