SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 79

• Manufacturer Part Number: SPC5121YVY400BR
• Manufacturer: Freescale

Specifications of SPC5121YVY400BR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

For a board with a COP (common on-chip processor) connector that accesses the JTAG interface and needs to reset the JTAG
module, only wiring TRST and PORESET is not recommended.
To reset the MPC5121e/MPC5123 via the COP connector, the HRESET pin of the COP should be connected to the HRESET
pin of the MPC5121e/MPC5123. The circuitry shown in
any other board sources can drive PORESET.
Freescale Semiconductor
1
2
3
4
Pin #
BDM
With respect to the emulator tool’s perspective:
Input is really an output from the embedded e300 core.
Output is really an input to the core.
From the board under test, power sense for chip power.
HALTED is not available from e300 core.
Input to the e300 core to enable/disable soft-stop condition during breakpoints.
MPC5121e/MPC5123 internally ties CORE_QACK to GND in its normal/functional mode
(always asserted).
2
1
MPC5121e/MPC51
23 I/O Pin
See Note
TDO
Table 52. COP/BDM Interface Signals (continued)
4
MPC5121E/MPC5123 Data Sheet, Rev. 3
BDM Connector
qack
tdo
4
Figure 61
Pull Up/Down
allows the COP to assert HRESET or TRST separately, while
Internal
—
—
Pull Up/Down
External
—
—
System Design Information
I/O
O
I
1
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