SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 73

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SPC5121YVY400BR

Manufacturer Part Number
SPC5121YVY400BR
Description
Manufacturer
Freescale
Datasheet

Specifications of SPC5121YVY400BR

Lead Free Status / RoHS Status
Supplier Unconfirmed
3.3.23
Freescale Semiconductor
1
2
3
TRST is an asynchronous signal. The setup time is for test purposes only.
Non-test, other than TDI and TMS, signal input timing with respect to TCK.
Non-test, other than TDO, signal output timing with respect to TCK.
Sym
10
11
12
13
1
2
3
4
5
6
7
8
9
IEEE 1149.1 (JTAG)
TCK
TCK frequency of operation
TCK cycle time
TCK clock pulse width measured at 1.5V
TCK rise and fall times
TRST setup time to tck falling edge
TRST assert time
Input data setup time
Input data hold time
TCK to output data valid
TCK to output high impedance
TMS, TDI data setup time.
TMS, TDI data hold time.
TCK to TDO data valid.
TCK to TDO high impedance.
Figure 52. Timing Diagram – JTAG Clock Input
2
2
3
Characteristic
3
Table 50. JTAG Timing Specification
MPC5121E/MPC5123 Data Sheet, Rev. 3
3
1
VM = Midpoint Voltage
Numbers shown reference JTAG Timing Specification Table
VM
3
2
1
VM
1.08
Min
10
15
40
0
0
5
5
0
0
5
1
0
0
Electrical and Thermal Characteristics
2
Max
30
30
15
15
25
3
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
VM
SpecID
A23.11
A23.12
A23.10
A23.13
A23.14
A23.1
A23.2
A23.3
A23.4
A23.5
A23.6
A23.7
A23.8
A23.9
73

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