SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 63

• Manufacturer Part Number: SPC5121YVY400BR
• Manufacturer: Freescale

Specifications of SPC5121YVY400BR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

The DELTA_X and DELTA_Y parameters are programmed via the DISP_SIZE register; The PW_H, BP_H, and FP_H
parameters are programmed via the HSYN_PARA register; And the PW_V, BP_V and FP_V parameters are programmed via
the VSYN_PARA register. See appropriate section in the reference manual for detailed descriptions on these parameters.
Figure 43
Freescale Semiconductor
Parameter
1
t
t
t
t
t
t
CKH
DSU
DHD
CSU
CHD
CKL
Display interface pixel clock period immediate value (in nanosecond).
Name
t
t
t
t
t
t
t
PWV
FPH
HSP
BPV
FPV
t
VSP
SW
SH
depicts the synchronous display interface timing for access level, and
DIU_HSYNC
DIU_VSYNC
DIU_DE
DIU_CLK
DIU_LD[23:0]
LCD Interface Pixel Clock High Time
LCD Interface Pixel Clock Low Time
LCD Interface Data Setup Time
LCD Interface Data Hold Time
LCD Interface Control Signal Setup Time
LCD Interface Control Signal Hold Time
HSYNC Front Porch Width
Screen Width
HSYNC (Line) Period
VSYNC Pulse Width
VSYNC Back Porch Width
VSYNC Front Porch Width
Screen Height
VSYNC (Frame) Period
Table 37. LCD Interface Timing Parameters – Pixel Level (continued)
Description
Table 38. LCD Interface Timing Parameters – Access Level
Description
Figure 43. LCD Interface Timing Diagram – Access Level
t
CKH
MPC5121E/MPC5123 Data Sheet, Rev. 3
t
CKL
FP_H * t
DELTA_X * t
(PW_H + BP_H + DELTA_X + FP_H) * t
PW_V * t
BP_V * t
FP_V * t
DELTA_Y * t
(PW_V + BP_V + DELTA_Y + FP_H) * t
t
t
PCP
PCP
HSP
PCP
HSP
HSP
Min
5.0
6.0
5.0
6.0
* 0.4
* 0.4
PCP
HSP
t
t
DHD
CHD
Value
t
t
PCP
PCP
Typ
t
t
CSU
DSU
-
-
-
-
* 0.5
* 0.5
Table 38
Electrical and Thermal Characteristics
t
t
PCP
PCP
lists the timing parameters.
Max
HSP
PCP
-
-
-
-
* 0.6
* 0.6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
SpecID
A15.10
A15.11
A15.4
A15.5
A15.6
A15.7
A15.8
A15.9
SpecID
A15.12
A15.13
A15.14
A15.15
A15.16
A15.17
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