SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 69

• Manufacturer Part Number: SPC5121YVY400BR
• Manufacturer: Freescale

Specifications of SPC5121YVY400BR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Freescale Semiconductor
(CLKPOL=0)
(CLKPOL=1)
Sym
1
2
3
4
5
6
7
8
9
Output
Output
Output
Output
MOSI
MISO
SCK
Input
SCK cycle time, programable in the PSC CCS register
SCK pulse width, 50% SCK duty cycle
Slave select clock delay
Input Data setup time
Input Data hold time
Output data valid after SS
Output data valid after SCK
Slave disable lag time
Minimum Sequential Transfer delay = 2 * IP Bus clock cycle time
SCK
SS
Table 45. Timing Specifications – SPI Slave Mode, Format 0 (CPHA = 0)
Figure 48. Timing Diagram – SPI Master Mode, Format 0 (CPHA = 0)
4
6
3
Output timing is specified at a nominal 50 pF load.
Description
MPC5121E/MPC5123 Data Sheet, Rev. 3
2
5
7
1
6
2
NOTE
10
11
7
10
11
30.0
30.0
15.0
Min
1.0
1.0
1.0
0.0
—
—
Electrical and Thermal Characteristics
8
14.0
14.0
Max
—
—
—
—
—
—
—
9
Units
ns
ns
ns
ns
ns
ns
ns
ns
—
SpecID
A20.37
A20.39
A20.38
A20.40
A20.41
A20.42
A20.43
A20.44
A20.45
69