SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 16
SPC5121YVY400BR
Manufacturer Part Number
SPC5121YVY400BR
Description
Manufacturer
Freescale
Datasheet
1.SPC5121YVY400BR.pdf
(86 pages)
Specifications of SPC5121YVY400BR
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Electrical and Thermal Characteristics
1) This pin is an input or open-drain output. This pin can not be configured. There is an internal pull-up resistor implemented.
2) This pin is an input only. This pin can not be configured.
3) These JTAG pins have internal pull-up P-FETs. This pin can not be configured.
4) This pins should have an external pull-up resistor. Follow PCI specification and see System Design Information.
5) This test pin must be tied to VSS.
6) This pin contains an enabled internal schmitt-trigger.
3
3.1
3.1.1
The tables in this section describe the MPC5121e/MPC5123 DC Electrical characteristics.
ratings.
16
Supply voltage – e300 core and peripheral logic
Supply voltage – I/O buffers
Supply voltage – System APLL, System Oscillator
Supply voltage – e300 APLL
Supply voltage – RTC (Hibernation)
Supply voltage – FUSE Programming
Supply voltage – FUSE Reading
Supply voltage – SATA PHY analog
Supply voltage – SATA PHY voltage regulator
Supply voltage – SATA PHY Tx/Rx
Supply voltage – SATA PHY PLL
Supply voltage – USB PHY PLL and OSC
Electrical and Thermal Characteristics
DC Electrical Characteristics
SATA_PLL_VSSA
SATA_RX_VSSA
SATA_TX_VSSA
Absolute Maximum Ratings
This table indicates only the pins with permananently enabled internal pull-up, pull-down,
or schmitt-trigger. Most of the digital I/O pins can be configured to enable internal pull-up,
pull-down, or schmitt-trigger. See MPC5121e Reference Manual, IO Control chapter.
Signal
Characteristic
Table 3. MPC5121e/MPC5123 TE-PBGA Pinout Listing (Sheet 13 of 13)
Package Pin Number
Table 4. Absolute Maximum Ratings
MPC5121E/MPC5123 Data Sheet, Rev. 3
A6, B4
D3
G1
SATA_PLL_VDDA1P2
SATA_VDDA_VREG
CORE_PLL_AVDD
SATA_VDDA_3P3
SATA_VDDA_1P2
USB_PLL_PWR3
SYS_PLL_AVDD
AVDD_FUSEWR
AVDD_FUSERD
VDD_MEM_IO
NOTE
Analog Ground
Analog Ground
Analog Ground
VDD_CORE
VBAT_RTC
VDD_IO,
Pad Type
Sym
Power Supply
–0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
Min
1
—
—
—
Table 4
Max
1.47
1.47
1.47
3.6
3.6
3.6
3.6
3.6
2.6
3.6
3.6
3.6
gives the absolute maximum
Freescale Semiconductor
Notes
—
—
—
Unit
V
V
V
V
V
V
V
V
V
V
V
V
SpecID
D1.10
D1.11
D1.12
D1.1
D1.2
D1.3
D1.4
D1.5
D1.6
D1.7
D1.8
D1.9
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