SPC5121YVY400BR Freescale, SPC5121YVY400BR Datasheet - Page 56

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SPC5121YVY400BR

Manufacturer Part Number
SPC5121YVY400BR
Description
Manufacturer
Freescale
Datasheet

Specifications of SPC5121YVY400BR

Lead Free Status / RoHS Status
Supplier Unconfirmed
Electrical and Thermal Characteristics
3.3.10
1.5 Gbps SATA PHY Layer
See “Serial ATA: High Speed Serialized AT Attachment” Revision 1.0a, 7-January-2003.
3.3.11
AC Test Timing Conditions:
56
Sym
Parameter
t
t
t
t
1
2
3
4
Output Loading
All Outputs: 25 pF
t2cyc
trfs1
ATA
tcvh
tmli
tss
tli
tli
tli
RXD[3:0], RX_DV, RX_ER to RX_CLK setup
RX_CLK to RXD[3:0], RX_DV, RX_ER hold
RX_CLK pulse width high
RX_CLK pulse width low
SATA PHY
FEC
UDMA Out
Parameter
tdzfs_mli
Timing
tdzfs
tcvh
trfs
ton
toff
tss
tli1
tli2
tli3
Table 30. Timing Parameters UDMA Out Burst (continued)
Description
t2cyc = time_cyc * 2 * T
trfs = 1.6 * T + tsui + tco + tbuf + tbuf
tdzfs = time_dzfs * T – (tskew1)
tss = time_ss * T – (tskew1 + tskew2)
tdzfs_mli =max(time_dzfs, time_mli) * T – (tskew1
+ tskew2)
tli1 > 0
tli2 > 0
tli3 > 0
tcvh = (time_cvh *T) – (tskew1 + tskew2)
ton = time_on * T – tskew1
toff = time_off * T – tskew1
MPC5121E/MPC5123 Data Sheet, Rev. 3
Table 31. MII Rx Signal Timing
Value
35%
35%
Min
5
5
Max
65%
65%
see Reference Manual
programming time_ss,
Reference Manual
Reference Manual
Reference Manual
RX_CLK Period
RX_CLK Period
time_dzfs, see
time_cvh, see
time_cyc, see
How to meet
calculate and
calculate and
programming
calculate and
programming
calculate and
programming
Unit
ns
ns
Freescale Semiconductor
1
1
SpecID
A9.68
A9.69
A9.70
A9.71
A9.72
A9.73
A9.74
A9.75
A9.76
A9.77
SpecID
A11.1
A11.2
A11.3
A11.4

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