MT48H8M16LFB4-75:J TR Micron Technology Inc, MT48H8M16LFB4-75:J TR Datasheet - Page 64

• Manufacturer Part Number: MT48H8M16LFB4-75:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Figure 42:
Figure 43:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
WRITE With Auto Precharge Interrupted by a READ
WRITE With Auto Precharge Interrupted by a WRITE
Notes:
Notes:
Internal
States
Internal
States
1. DQM is LOW.
1. DQM is LOW.
Command
Command
Address
Address
Bank m
Bank m
Bank n
Bank n
CLK
CLK
DQ
DQ
Page active
Page active
NOP
T0
T0
NOP
WRITE - AP
WRITE - AP
Page active
Bank n,
Page active
Bank n,
Bank n
Bank n
T1
Col a
Din
Col a
T1
Din
a
a
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
WRITE with burst of 4
WRITE with burst of 4
64
T2
a + 1
T2
a + 1
NOP
Din
Din
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Bank m,
READ - AP
T3
T3
a + 2
Col d
Bank m
Din
NOP
Interrupt burst, write-back
t
WR - bank n
READ with burst of 4
WRITE - AP
Bank m,
Col d
T4
T4
Bank m
Din
NOP
CL = 3 (bank m)
t
Interrupt burst, write-back
d
WR - bank n
WRITE with burst of 4
T5
T5
d + 1
NOP
NOP
Din
t
Precharge
RP - bank n
©2008 Micron Technology, Inc. All rights reserved.
Timing Diagrams
T6
T6
Dout
NOP
d + 2
NOP
Din
d
t RP - bank n
Precharge
Don’t Care
Don’t Care
T7
T7
Dout
d + 1
d + 3
NOP
NOP
Din
t WR - bank m
t RP - bank m
Write-back