MT48H8M16LFB4-75:J TR Micron Technology Inc, MT48H8M16LFB4-75:J TR Datasheet - Page 45

• Manufacturer Part Number: MT48H8M16LFB4-75:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Figure 20:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
READ-to-WRITE
Notes:
The DQM signal must be de-asserted prior to the WRITE command (DQM latency is
zero clocks for input buffers) to ensure that the written data is not masked. Figure 19 on
page 44 shows the case where the clock frequency provides for bus contention avoid-
ance without adding a NOP cycle, and Figure 21 on page 46 shows the case where the
additional NOP cycle is required.
A fixed-length READ burst may be followed by, or truncated with, a PRECHARGE
command to the same bank (provided that auto precharge was not activated). The
PRECHARGE command should be issued x cycles before the clock edge at which the last
desired data element is valid, where x = CL - 1. This is shown in Figure 22 on page 46 for
each possible CL; data element n + 3 is either the last of a burst of four or the last desired
data element of a longer burst. Following the PRECHARGE command, a subsequent
command to the same bank cannot be issued until
precharge time is hidden during the access of the last data element(s).
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command. However, the advan-
tage of the PRECHARGE command is that it can be used to truncate fixed-length or
continuous page bursts.
1. CL = 3. The READ command can be to any bank, and the WRITE command can be to any
Command
Address
bank. If a burst of one is used, DQM is not required.
DQM
CLK
DQ
T0
READ
Bank,
Col n
T1
NOP
Transitioning data
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
T2
NOP
45
T3
Dout n
NOP
t HZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CK
Don’t Care
T4
WRITE
Bank,
Col b
Din b
t
DS
t
RP is met. Note that part of the row
©2008 Micron Technology, Inc. All rights reserved.
Timing Diagrams