PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 159

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PEF81902FV1.1

Manufacturer Part Number
PEF81902FV1.1
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF81902FV1.1

Lead Free Status / RoHS Status
Supplier Unconfirmed
4.4
4.4.1
RFIFO
The RFIFO contains up to 32 bytes of received data.
After an ISTAH.RPF interrupt, a complete data block is available. The block size can be
4, 8, 16, 32 bytes depending on the EXMR.RFBS setting.
After an ISTAH.RME interrupt, the number of received bytes can be obtained by reading
the RBCL register.
A read access to any address within the range 00
FIFO location selected by an internal pointer which is automatically incremented after
each read access. This allows for the use of efficient “move string” type commands by
the microcontroller.
4.4.2
XFIFO
Depending on EXMR.XFBS up to 16 or 32 bytes of transmit data can be written to the
XFIFO following an ISTAH.XPR interrupt.
A write access to any address within the range 00-1F
location selected by an internal pointer which is automatically incremented after each
write access. This allows the use of efficient “move string” type commands by the
microcontroller.
4.4.3
ISTAH
Value after reset: 10
Data Sheet
7
7
Detailed HDLC Control and C/I Registers
RFIFO - Receive FIFO
XFIFO - Transmit FIFO
ISTAH - Interrupt Status Register HDLC
H
Transmit data
Receive data
read
write
read
145
H
H
-1F
gives access to the “current” FIFO
H
gives access to the “current”
Register Description
Address: 00-1F
Address: 00-1F
Address:
PEF 81902
2001-11-12
0
0
20
H
H
H

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