PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 116

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

• The host reads the first data block from RFIFO and acknowledges the reception by
• The second 32 byte block is indicated by RPF which is read and acknowledged by the
• The reception of the remaining 4 bytes are indicated by RME (i.e. the receive status
• The host gets the number of received bytes (COUNT = 5) from RBCL/RBCH and
• The second frame is received and indicated by RME interrupt.
• The host gets the number of bytes (COUNT = 13) from RBCL/RBCH and reads out
• The third frame is transferred in the same way.
•
Figure 45
2.6.2.2
The management of the received HDLC frames as affected by the different operating
modes (see
Data Sheet
Receive
Frame
RMC. Meanwhile the second data block is received and stored in RFIFO.
host as described before.
in RSTA register is always appended to the end of a frame).
reads out the RFIFO and optionally the status register RSTA. The frame is
acknowledged by RMC.
the RFIFO and status registers. The RFIFO is acknowledged by RMC.
32
RPF
Receive Frame Structure
32 Bytes
Chapter
RD
Reception Sequence Example
Bytes
32
68
RMC
RPF
2.6.1) is shown in
4
32 Bytes
Bytes
RD
12
12
RMC
Bytes
12
12
RME
Count
RD
Figure
CPU Interface
IOM Interface
*
5 Bytes
1)
102
RD
The last byte contains the receive status information <RSTA>
*
1)
RMC
46.
RME
Count
RD
13 Bytes
RD
*
1)
Functional Description
RMC RME
Count
RD
PEF 81902
13 Bytes
2001-11-12
RD
*
fifoseq_rec.vsd
1)
RMC