EP2SGX90EF1152C3 Altera, EP2SGX90EF1152C3 Datasheet - Page 56

• Manufacturer Part Number: EP2SGX90EF1152C3
• Description: Stratix II GX
• Manufacturer: Altera

Adaptive Logic Modules
Adaptive Logic
Modules
Figure 2–35. High-Level Block Diagram of the Stratix II GX ALM
2–48
Stratix II GX Device Handbook, Volume 1
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
Combinational
Logic
The basic building block of logic in the Stratix II GX architecture is the
ALM. The ALM provides advanced features with efficient logic
utilization. Each ALM contains a variety of look-up table (LUT)-based
resources that can be divided between two adaptive LUTs (ALUTs). With
up to eight inputs to the two ALUTs, one ALM can implement various
combinations of two functions. This adaptability allows the ALM to be
completely backward-compatible with four-input LUT architectures. One
ALM can also implement any function of up to six inputs and certain
seven-input functions.
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a
shared arithmetic chain, and a register chain. Through these dedicated
resources, the ALM can efficiently implement various arithmetic
functions and shift registers. Each ALM drives all types of interconnects:
local, row, column, carry chain, shared arithmetic chain, register chain,
and direct link interconnects.
diagram of the Stratix II GX ALM while
view of all the connections in the ALM.
shared_arith_out
shared_arith_in
carry_out
carry_in
adder0
adder1
reg_chain_out
reg_chain_in
Figure 2–35
Figure 2–36
D
D
shows a high-level block
reg0
reg1
Q
Q
shows a detailed
Altera Corporation
To general or
To general or
To general or
To general or
local routing
local routing
local routing
local routing
October 2007