EP2SGX90EF1152C3 Altera, EP2SGX90EF1152C3 Datasheet - Page 241

• Manufacturer Part Number: EP2SGX90EF1152C3
• Description: Stratix II GX
• Manufacturer: Altera

Altera Corporation
June 2009
(1)
(2)
t
t
t
t
t
t
t
t
t
t
t
INREG2PIPE9
INREG2PIPE18
INREG2PIPE36
PIPE2OUTREG2ADD
PIPE2OUTREG4ADD
PD9
PD18
PD36
CLR
CLKL
CLKH
Table 4–58. DSP Block Internal Timing Microparameters (Part 2 of 2)
Symbol
This column refers to –3 speed grades for EP2SGX30, EP2SGX60, and EP2SGX90 devices.
This column refers to –3 speed grades for EP2SGX130 devices.
Input register to
DSP block pipeline
register in 9 × 9-bit
mode
Input register to
DSP block pipeline
register in 18 × 18-
bit mode
Input register to
DSP block pipeline
register in 36 × 36-
bit mode
DSP block pipeline
register to output
register delay in
two-multipliers
adder mode
DSP block pipeline
register to output
register delay in
four-multipliers
adder mode
Combinational input
to output delay for
9 × 9
Combinational input
to output delay for
18 × 18
Combinational input
to output delay for
36 × 36
Minimum clear pulse
width
Minimum clock low
time
Minimum clock high
time
Parameter
1312
1302
1302
1134
2100
2110
2939
2212
1190
1190
Min
924
Grade
-3 Speed
2030
2010
2010
1450
1850
2880
2990
4450
(1)
Max
1312
1302
1302
1134
2100
2110
2939
2322
1249
1249
Min
924
Grade
-3 Speed
(2)
Max
2131
2110
2110
1522
1942
3024
3139
4672
Stratix II GX Device Handbook, Volume 1
1312
1302
1302
1134
2100
2469
1328
1328
2110
2939
Min
924
DC and Switching Characteristics
-4 Speed
Grade
Max
2266
2244
2244
1618
2065
3214
3337
4967
1312
1302
1302
1134
2100
2110
2939
2964
1594
1594
Min
924
-5 Speed
Grade
2720
2693
2693
1943
2479
3859
4006
5962
Max
Unit
4–71
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps