EP2SGX90EF1152C3 Altera, EP2SGX90EF1152C3 Datasheet - Page 154
EP2SGX90EF1152C3
Manufacturer Part Number
EP2SGX90EF1152C3
Description
Stratix II GX
Manufacturer
Altera
Datasheet
1.EP2SGX90EF1152C3.pdf
(316 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX90EF1152C3
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2SGX90EF1152C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 154 of 316
- Download datasheet (2Mb)
Document Revision History
2–146
Stratix II GX Device Handbook, Volume 1
Table 2–42. Document Revision History (Part 4 of 6)
Document
Date and
Version
Updated:
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
Updated bulleted lists at the beginning of the
“Transceivers” section.
Added reference to the “Transmit Buffer”
section.
Deleted the Programmable V
“Programmable Output Driver” section.
Data Width” heading in Table 2–14.
Deleted “Global & Regional Clock
Connections from Right Side Clock Pins &
Fast PLL Outputs” table.
Updated notes to Tables 2–29 and 2–37.
Updated notes to Figures 2–72, 2–73 and
2–74.
Updated bulleted list in the “Advanced I/O
Standard Support” section.
Changed “PLD Interface” heading to “Parallel
“Transmitter PLLs”
“Transmitter Phase Compensation FIFO
Buffer”
“8B/10B Encoder”
“Byte Serializer”
“Programmable Output Driver”
“Receiver PLL & CRU”
“Programmable Pre-Emphasis”
“Receiver Input Buffer”
“Control and Status Signals”
“Programmable Run Length Violation”
“Channel Aligner”
“Basic Mode”
“Byte Ordering Block”
“Receiver Phase Compensation FIFO
Buffer”
“Loopback Modes”
“Serial Loopback”
“Parallel Loopback”
“Regional Clock Network”
“MultiVolt I/O Interface”
“High-Speed Differential I/O with DPA
Support”
Changes Made
OD
table from the
Summary of Changes
Altera Corporation
October 2007
Related parts for EP2SGX90EF1152C3
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: