AFS600-FGG484 Actel, AFS600-FGG484 Datasheet - Page 318

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG484

Manufacturer Part Number
AFS600-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG484

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
172
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Datasheet Information
5 - 2
Revision
v2.0, Revision 1
(continued)
The
Figure 2-85 • Intra-Conversion Timing Diagram
Conversion Timing Diagram
The
Table 2-46 • Analog Channel Specifications
Table 2-47 • ADC Characteristics in Direct Input Mode
In
In
note 1 was updated.
In
The data in the 2.5 V LCMOS and LVCMOS 2.5 V / 5.0 V rows were updated in
Table 2-72 • Fusion Standard and Advanced I/O – Hot-Swap and 5 V Input Tolerance
Capabilities.
In
1.5 V, for OUT_DRIVE 2, was changed from a dash to a check mark.
The
analog power supply input should be used to provide this input"
to
"1.5 V clean analog power supply input for use by the 1.5 V portion of the analog
circuitry."
In the
was changed from "V
V
to
"VCC33PMP should be powered up simultaneously with or after V
The
information about when to power the pin.
In the
FIPS-197.
The note in
Standard Applications
For 1.5 V LVCMOS, the V
VCCI and 0.70 * VCCI was changed to 0.65 * VCCI in
Maximum and Minimum DC Input and Output Levels Applicable to Commercial and
Industrial
and Output Levels Applicable to Commercial and Industrial
Table 2-85 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial
In
Applicable to Commercial and Industrial
updated.
Table 2-86 • Summary of Maximum and Minimum DC Input Levels Applicable to
Commercial and Industrial Conditions
temperature ranges were also updated in notes 1 and 2.
CC33A
Table 2-49 • Calibrated Analog Channel Accuracy
Table 2-51 • ACM Address Decode Table for Analog
Table 2-50 • Analog Channel Accuracy: Monitoring Standard Positive
Table 2-84 • Summary of Maximum and Minimum DC Input and Output Levels
Table 2-75 • Fusion Standard I/O Standards—OUT_DRIVE
"ADC Configuration Description" section
"Typical Performance Characteristics" section
"VCC15A Analog Power Supply (1.5 V)"
"VCCOSC Oscillator Power Supply (3.3 V)" section
"VCC33PMP Analog Power Supply (3.3 V)"
"128-Bit AES Decryption"
"
Conditions,
Table 2-81 • Fusion Standard and Advanced I/O Attributes vs. I/O
CC33PMP
was updated.
Table 2-84 • Summary of Maximum and Minimum DC Input
IL
and V
are new.
should be powered up before or simultaneously with
section, FIPS-192 was incorrect and changed to
IH
parameters, 0.30 * VCCI was changed to 0.35 *
R e vi s i o n 1
Changes
was updated to include notes 3 and 4. The
Conditions.
was significantly updated.
Conditions, the VIH max column was
was updated. Please review carefully.
definition was changed from "A 1.5 V
is new.
pin description, the following text
1,2,3
and
was significantly updated.
, note 2 was updated.
Quad, bit 89 was removed.
Table 2-83 • Summary of
Figure 2-86 • Injected-
was updated to include
Settings, LVCMOS
CC33A
Conditions, and
."
Voltages,
2-166
2-104
2-122
2-125
2-126
2-128
2-145
2-154
2-225
2-225
2-225
2-230
2-158
2-167
2-167
Page
2-110
2-117
2-119
to

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