AFS600-FGG484 Actel, AFS600-FGG484 Datasheet - Page 317

• Manufacturer Part Number: AFS600-FGG484
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AFS600-FGG484

• Processor Series: AFS600
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 172
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 600 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5 – Datasheet Information
List of Changes
Revision
July 2010
v2.0, Revision 1
(July 2009)
The following table lists critical changes that were made in each revision of the Fusion datasheet.
The versioning system for datasheets has been changed. Datasheets are assigned
a revision number that increments each time the datasheet is revised. The
Device Status" table
The MicroBlade and Fusion datasheets have been combined. Pigeon Point
information is new.
CoreMP7 support was removed since it is no longer offered.
–F was removed from the datasheet since it is no longer offered.
The operating temperature was changed from ambient to junction to better reflect
actual conditions of operations.
Commercial: 0°C to 85°C
Industrial: –40°C to 100°C
The version number category was changed from Preliminary to Production, which
means the datasheet contains information based on final characterization. The
version number changed from Preliminary v1.7 to v2.0.
The
reference to the "Analog System
chapter of the datasheet, which includes
and specific voltage data.
The phrase "Commercial-Case Conditions" in timing table titles was changed to
"Commercial Temperature Range Conditions."
The
The
Please review carefully.
There was a typo in
ERASEPAGE description; it was the same as DISCARDPAGE. As as a result, the
ERASEPAGE description was updated.
The t
Timing.
Table 2-31 • RAM4K9
In
was changed from "Comparator power-down if 1"
to
"ADC comparator power-down if 1. When asserted, the ADC will stop functioning,
and the digital portion of the analog block will continue operating. This may result in
invalid status flags from the analog block. Therefore, Actel does not recommend
asserting the PWRDWN pin."
Figure 2-76 • Gate Driver Example
Table 2-36 • Analog Block Pin
"Crystal Oscillator" section
"Integrated Analog Blocks and Analog I/Os" section
"Real-Time Counter (part of AB macro)" section
FMAXCLKNVM
parameter was updated in
indicates the status for each device in the device family.
and
Table 2-19 • Flash Memory Block Pin Names
Table 2-32 • RAM512X18
was updated significantly. Please review carefully.
Description, the Function description for PWRDWN
Characteristics"
was updated.
R e v i s i o n 1
Changes
Table 2-46 • Analog Channel Specifications
Table 2-25 • Flash Memory Block
section in the
were updated.
was updated significantly.
was updated to include a
Device Architecture
"Fusion
for the
Page
2-21
2-35
2-42
2-54
2-71
2-82
2-95
N/A
N/A
N/A
1-4
5 -1