71M6534-IGT/F Maxim Integrated Products, 71M6534-IGT/F Datasheet - Page 94

• Manufacturer Part Number: 71M6534-IGT/F
• Description: IC ENERY METER 3PH 128K 120-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 71M6534-IGT/F

• Mounting Style: SMD/SMT
• Package / Case: LQFP-120
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

71M6533/G/H and 71M6534/H Data Sheet
†
94
VERSION[7:0]
VREF_CAL
VREF_DIS
WAKE_ARM
WAKE_PRD
WAKE_RES
WD_NROVF_
FLAG
WD_RST
WD_OVF
WE
WRPROT_BT
WRPROT_CE
Applicable to the 71M6534 only.
2006
20C8
2004[7]
2004[3]
20A9[7]
20A9[2:0]
20A9[3]
20B1[0]
SFR F8[7]
2002[2]
201F[7:0]
SFR B2[5]
SFR B2[4]
001
–
–
0
0
0
0
–
0
0
0
0
NV*
–
–
0
0
–
–
–
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
R
R
When set, this bit protects flash addresses from 0 to BOOT_SIZE*1024 from flash page erase.
The device version index. This word may be read by the firmware to determine the
silicon version.
Brings VREF to the VREF pad. This feature is disabled when VREF_DIS =1.
Disables the internal voltage reference.
Writing a 1 to this bit arms the autowake timer and presets it with the values presently
in WAKE_PRD and WAKE_RES. The autowake timer is reset and disarmed whenever
the processor is in MISSION mode or BROWNOUT mode. The timer must be armed
at least three RTC cycles before the SLEEP or LCD-ONLY mode is commanded.
Sleep time. Time = WAKE_PRD[2:0]*WAKE_RES. The default = 001. The maximum
value is 7.
Resolution of WAKE timer: 1 = 1 minute, 0 = 2.5 seconds.
This flag is set approximately 1 ms before the watchdog timer overflows. It is cleared
by writing a 0 or on the falling edge of WAKE.
WD timer bit. This bit must be accessed with byte operations. Operations possible for
this bit are:
The WDT overflow status bit, set when the WDT overflows. It is preserved in LCD
mode and will indicate at bootup if the part is recovering from a WDT overflow or a
power fault. This bit should be cleared by the MPU on bootup. It is also automatically
cleared when RESET is high.
*Not preserved in SLEEP mode
When set, this bit protects flash addresses from CE_LCTN*1024 to the end of memory
from flash page erase.
An 8-bit value has to be written to this address prior to accessing the RTC registers.
VERSION[7:0]
Write 0: Clears the flag.
Write 1: Resets the WDT.
0000 0101
Silicon Version
A05
FDS_6533_6534_004
Rev 2