MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 4

• Manufacturer Part Number: MC908MR32CFUE
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR32CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 6
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
4
December,
November,
October,
August,
Date
2001
2001
2001
2003
2005
July,
Revision
Level
3.0
4.0
5.0
6.0
6.1
Figure 2-1. MC68HC908MR32 Memory Map — Added FLASH Block Protect
Register (FLBPR) at address location $FF7E
Figure A-1. MC68HC908MR16 Memory Map — Added FLASH Block Protect
Register (FLBPR) at address location $FF7E
3.3.3 Conversion Time — Reworked equations and text for clarity.
Figure 18-8. Monitor Mode Circuit — PTA7 and connecting circuitry added
Table 18-2. Monitor Mode Signal Requirements and Options — Switch locations
added to column headings for clarity
Section 16. Timer Interface A (TIMA) — Timer discrepancies corrected throughout
this section.
Section 17. Timer Interface B (TIMB) — Timer discrepancies corrected throughout
this section.
Reformatted to meet current publication standards
2.8.2 FLASH Page Erase Operation — Procedure reworked for clarity
2.8.3 FLASH Mass Erase Operation — Procedure reworked for clarity
2.8.4 FLASH Program Operation — Procedure reworked for clarity
Figure 14-14. SIM Break Status Register (SBSR) — Clarified definition of SBSW bit.
19.5 DC Electrical Characteristics — Corrected maximum value for monitor mode
entry voltage (on IRQ)
19.6 FLASH Memory Characteristics — Updated table entries
Updated to meet Freescale identity guidelines.
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Description
Freescale Semiconductor
Throughout
Throughout
Number(s)
Page
306
279
281
233
255
207
291
292
29
50
42
42
43