MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 195

IC MCU 8MHZ 32K FLASH 64-QFP

MC908MR32CFUE

Manufacturer Part Number
MC908MR32CFUE
Description
IC MCU 8MHZ 32K FLASH 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908MR32CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
44
Number Of Timers
6
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 15
Serial Peripheral Interface Module (SPI)
15.1 Introduction
The serial peripheral interface (SPI) module allows full-duplex, synchronous, serial communications with
peripheral devices.
15.2 Features
Features of the SPI module include:
15.3 Pin Name Conventions
The generic names of the SPI input/output (I/O) pins are:
SPI pins are shared by parallel I/O ports or have alternate functions. The full name of an SPI pin reflects
the name of the shared port pin or the name of an alternate pin function. The generic pin names appear
in the text that follows.
Freescale Semiconductor
Full-duplex operation
Master and slave modes
Double-buffered operation with separate transmit and receive registers
Four master mode frequencies (maximum = bus frequency ÷ 2)
Maximum slave mode frequency = bus frequency
Serial clock with programmable polarity and phase
Two separately enabled interrupts with central processor unit (CPU) service:
Mode fault error flag with CPU interrupt capability
Overflow error flag with CPU interrupt capability
Programmable wired-OR mode
I
SS, slave select
SPSCK, SPI serial clock
MOSI, master out/slave in
MISO, master in/slave out
2
C (inter-integrated circuit) compatibility
SPRF (SPI receiver full)
SPTE (SPI transmitter empty)
Generic Pin Names:
Full Pin Names:
Table 15-1
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Table 15-1. Pin Name Conventions
shows the full names of the SPI I/O pins.
PTF3/MISO
MISO
PTF2/MOSI
MOSI
PTF0/SPSCK
SPSCK
PTF1/SS
SS
195

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