MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 268

IC MCU 8MHZ 32K FLASH 64-QFP

MC908MR32CFUE

Manufacturer Part Number
MC908MR32CFUE
Description
IC MCU 8MHZ 32K FLASH 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908MR32CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
44
Number Of Timers
6
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Electrical Specifications
19.6 FLASH Memory Characteristics
19.7 Control Timing
268
RAM data retention voltage
FLASH program bus clock frequency
FLASH read bus clock frequency
FLASH page erase time
FLASH mass erase time
FLASH PGM/ERASE to HVEN setup time
FLASH high-voltage hold time
FLASH high-voltage hold time (mass erase)
FLASH program hold time
FLASH program time
FLASH return to read time
FLASH cumulative program HV period
FLASH endurance
FLASH data retention time
Frequency of operation
Internal operating frequency
RESET input pulse width low
1. f
2. t
3. t
4. Typical endurance was evaluated for this product family. For additional information on how Freescale defines Typical
5. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
1. V
2. See
3. No more than 10% duty cycle deviation from 50%.
4. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
5. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
<1 K cycles
>1 K cycles
Crystal option
External clock option
clearing HVEN to 0.
t
Endurance, please refer to Engineering Bulletin EB619.
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618.
information.
Read
HV
RCV
HV
DD
is defined as the cumulative high voltage programming time to the same row before next erase.
must satisfy this condition: t
= 5.0 Vdc ± 10%, V
19.8 Serial Peripheral Interface Characteristics
is defined as the time it needs before the FLASH can be read after turning off the high voltage charge pump, by
is defined as the frequency range for which the FLASH memory can be read.
(4)
(3)
(2)
Characteristic
Characteristic
(5)
SS
(5)
= 0 Vdc; timing shown with respect to 20% V
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
NVS
+ t
(1)
NVH
+ t
PGS
+ (t
for more information.
PROG
x 32) ≤ t
Symbol
f
t
HV
t
Read
t
MErase
V
t
t
RCV
t
PROG
t
t
t
Erase
NVHL
HV
NVH
PGS
Symbol
NVS
RDR
maximum.
f
DD
(3)
OSC
t
f
(2)
(1)
IRL
OP
and 70% V
10 k
Min
100
1.3
0.9
3.6
10
30
15
1
0
4
5
5
1
dc
Min
DD
50
1
(4)
, unless otherwise noted
100 k
Typ
100
1
4
Freescale Semiconductor
Max
32.8
8.2
8
Max
8 M
1.1
5.5
40
4
MHz
MHz
Unit
Cycles
ns
Years
MHz
Unit
ms
ms
ms
Hz
µs
µs
µs
µs
µs
µs
V

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