MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 227

• Manufacturer Part Number: MC908MR32CFUE
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR32CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 6
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PS[2:0] — Prescaler Select Bits
16.7.2 TIMA Counter Registers
The two read-only TIMA counter registers contain the high and low bytes of the value in the TIMA counter.
Reading the high byte (TACNTH) latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL is read. Reset clears the TIMA
counter registers. Setting the TIMA reset bit (TRST) also clears the TIMA counter registers.
Freescale Semiconductor
These read/write bits select either the
input to the TIMA counter as
Register Name and Address:
Register Name and Address:
Reset:
Reset:
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL by
reading TACNTL before exiting the break interrupt. Otherwise, TACNTL
retains the value latched during the break.
Read:
Read:
Write:
Write:
Figure 16-6. TIMA Counter Registers (TACNTH and TACNTL)
Bit 15
Bit 7
Bit 7
Bit 7
R
R
R
0
0
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
PS[2:0]
= Reserved
000
001
010
011
100
101
110
111
Bit 14
Bit 6
Table 16-1
R
R
6
0
6
0
Table 16-1. Prescaler Selection
TACNTH — $000F
TACNTL — $0010
Bit 13
Bit 5
PTE3/TCLKA
R
R
5
0
5
0
shows. Reset clears the PS[2:0] bits.
NOTE
Bit 12
Bit 4
R
R
4
0
4
0
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIMA Clock Source
Internal bus clock ÷1
pin or one of the seven prescaler outputs as the
PTE3/TCLKA
Bit 11
Bit 3
R
R
3
0
3
0
Bit 10
Bit 2
R
R
2
0
2
0
Bit 9
Bit 1
R
R
1
0
1
0
Bit 0
Bit 8
Bit 0
Bit 0
R
R
0
0
I/O Registers
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